91³Ô¹ÏÍø

Sep 03, 2024/5 min read

Combining Silicon Data Capture and Edge Processing Offers a Promising Solution for Automotive OEMs

By Lorin Kennedy

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Automotive

Aug 26, 2024/4 min read

Accelerating the Pace and Precision of AI Chip Innovation: Synopsys Expanding ZeBu Cloud Capacity

By Stelios Diamantidis

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Silicon IP

Jul 09, 2024/4 min read

How to Use Python to Customize PrimeTime

By Manoz Palaparthi

Tags: Chip Design Insights, Design, Signoff

Jun 26, 2024/2 min read

The Dynamic Traceability Method: Revolutionizing Software Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jun 25, 2024/3 min read

Imec and Synopsys Lower the Barriers to 2nm Technology With New Pathfinding Design Kit

By Kritti Pathak, Alec Vogt

Tags: Chip Design Insights, Design, Inside Synopsys

Jun 24, 2024/3 min read

How Chip Makers Are Defying Complexity and Innovating Faster

By Shankar Krishnamoorthy

Tags: AI & Machine Learning, Chip Design Insights, Design

Jun 12, 2024/5 min read

GUC Leverages 3DIC Compiler to Enable 2.5D/3D Multi-Die Package

By Synopsys Editorial Staff, WeiHsun Liao

Tags: Customer Spotlight, Multi-Die System, Chip Design Insights, Design, 3DIC Compiler

Jun 06, 2024/5 min read

Create Smarter, More Reliable Software-Defined Vehicles with Synopsys and AWS

By Ajit Kolhe, Randy Fish, Mohan Yellapantula, Marc Serughetti, Stewart Williams

Tags: Chip Design Insights, Design, Automotive

May 30, 2024/2 min read

Leveraging Generative AI for Chip Design: A New Era of Innovation Explored at Computex

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

May 09, 2024/3 min read

CoreHW Develops 80GHz mmWave PLL with Synopsys RFIC Design Flow on GlobalFoundries 22FDX Technology

By Jian Yang, Sween Kang

Tags: Customer Spotlight, Custom Implementation, Chip Design Insights, Design

Apr 30, 2024/5 min read

Why Analog Design Challenges Need Breakthrough Technologies

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Analog Design, Inside Synopsys

Apr 22, 2024/6 min read

What You Need to Know About Gate-All-Around Designs

By Andrew Appleby

Tags: Chip Design Insights, Design, 5nm and Below, Silicon IP

Apr 18, 2024/2 min read

Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud

By Anuj Pant

Tags: Customer Spotlight, Cloud, Chip Design Insights, Design, Physical Implementation, Signoff

Apr 16, 2024/4 min read

Leveraging Early Power Network Analysis to Accelerate Chip Design

By Rob van Blommestein

Tags: Chip Design Insights, Design, Physical Implementation

Apr 03, 2024/4 min read

Powering Innovation in the Era of Pervasive Intelligence

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Manufacturing, Verification, Inside Synopsys

Apr 01, 2024/4 min read

Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

By William Ruby

Tags: Low Power, Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

Mar 27, 2024/3 min read

TetraMem Delivers RISC-V AI Accelerator Tape-Out in Record Time on Synopsys Cloud

By Anuj Pant

Tags: Customer Spotlight, Cloud, Chip Design Insights, Design

Mar 26, 2024/4 min read

Can GPUs Accelerate Digital Design Implementation?

By James Chuang

Tags: Chip Design Insights, Design

Mar 20, 2024/3 min read

A Fast and Seamless Way to Burst to the Cloud for Peak EDA Workloads

By Vikram Bhatia

Tags: Cloud, Product Spotlight, Chip Design Insights, Design, Verification

Mar 15, 2024/4 min read

Synopsys and Arm Collaboration -Accelerating Development and Innovation for Arm-based Automotive Systems

By Marc Serughetti

Tags: Verification Central, Design, Automotive, Verification, Virtual Prototyping

Mar 13, 2024/4 min read

Synopsys Collaborates with Arm to Drive Automotive Design Excellence

By Stewart Williams

Tags: Chip Design Insights, SoC Verification Automation, Design, Automotive, Silicon IP, Verification, Virtual Prototyping, Platform

Mar 05, 2024/3 min read

CalligoTech Enables Next-Gen Computing at Scale with Synopsys Digital Design Flow

By Karan Shah, Irfan Shaikh

Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Physical Verification, Test, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center

Feb 28, 2024/5 min read

3 Key Trends for EDA in the Cloud in 2024

By Vikram Bhatia

Tags: Cloud, Chip Design Insights, Design, Verification

Feb 14, 2024/5 min read

How Power Device Workbench Ensures Maximum Efficiency

By Dermott Lynch

Tags: Product Spotlight, Chip Design Insights, Design

Jan 24, 2024/4 min read

Why Is the Power Device Market So Hot Right Now?

By Dermott Lynch

Tags: Low Power, Chip Design Insights, Design, Energy-Efficient SoCs

Jan 23, 2024/4 min read

Avoiding Multi-Die System Re-spins with New Early Architecture Exploration Technology

By Kamal Desai

Tags: Multi-Die System, Chip Design Insights, Design, Platform

Jan 22, 2024/5 min read

Can 3DHI Meet the Demands of Aerospace and Government Applications?

By Kenneth Larsen, Ian Land, Rob Aitken

Tags: Multi-Die System, Aerospace & Government, Chip Design Insights, Design

Jan 17, 2024/4 min read

Driving Higher Energy Efficiency in Automotive Electronics Designs

By William Ruby

Tags: Low Power, Chip Design Insights, Design, Energy-Efficient SoCs, Automotive

Jan 03, 2024/5 min read

How AI Is Enabling Digital Design Retargeting to Maximize Productivity

By Rob van Blommestein

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design

Nov 27, 2023/5 min read

Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design

By Geetha Rangarajan

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design, Verification

Nov 21, 2023/5 min read

How Photonics Can Light the Way for Higher Performing Multi-Die Systems

By Kenneth Larsen, Twan Korthorst

Tags: Multi-Die System, Chip Design Insights, Design, Photonic

Nov 16, 2023/4 min read

Synopsys Commits to Advancing IC Design Talent and Chip Development in Vietnam

By Deirdre Hanford

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Nov 15, 2023/7 min read

How Will Angstrom-Scale Chips Advance the Electronics Industry?

By Deepak Sherlekar, Rob Aitken

Tags: Machine Learning, AI & Machine Learning, Chip Design Insights, Design, 5nm and Below, Automotive, HPC, Data Center

Nov 14, 2023/4 min read

Synopsys Cloud: The Power of Automated License Management

By Varun Shah

Tags: Cloud, Product Spotlight, Chip Design Insights, Design, Verification

Nov 02, 2023/6 min read

Showcasing AI-Driven Analog Design Migration at Samsung SAFE Forum

By Neel Gopalan

Tags: Custom Implementation, Chip Design Insights, Design

Oct 31, 2023/3 min read

Pioneering Seamless Interoperability on Cloud Across the Semiconductor Design Ecosystem

By Vikram Bhatia

Tags: Cloud, Chip Design Insights, Design, Verification

Oct 26, 2023/5 min read

How OpenLight and Synopsys Are Reimagining Data Centers Through Silicon Photonics

By Jigesh K. Patel, Keivan Javadi Khasraghi

Tags: Data Center, Chip Design Insights, Design, Interface IP, Photonic, Silicon IP

Oct 12, 2023/5 min read

Accelerating Analog Design Migration

By Yuval Shay

Tags: Chip Design Insights, Design

Oct 11, 2023/7 min read

Ensuring the Health and Reliability of Multi-Die Systems

By Randy Fish, Yervant Zorian, Manuel Mota, Guy Cortez

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center

Oct 06, 2023/3 min read

Exploring Advanced Power Optimization for a More Sustainable Future

By William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Sep 21, 2023/4 min read

Samsung Foundry and Synopsys Accelerate Multi-Die System Design

By Henry Sheng, Jennifer Pyon

Tags: Multi-Die System, Product Spotlight, Chip Design Insights, Design

Sep 20, 2023/3 min read

New Unified Electrostatic Reliability Analysis Solution Has Your Chip Covered

By Dermott Lynch

Tags: Product Spotlight, Chip Design Insights, Design

Sep 20, 2023/1 min read

Automatic Test Case Generation: When It Makes Sense

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Aug 22, 2023/4 min read

Addressing Multi-Physics Effects for High-Performing Multi-Die Systems

By Shekhar Kapoor, Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design

Aug 16, 2023/5 min read

How to Augment SoC Development to Conquer Your Design Hurdles

By Rita Horner, Praveen Durga

Tags: Chip Design Insights, Design, HPC, Data Center

Aug 15, 2023/6 min read

How to Save Power and Keep HPC and Data Center Applications Cool

By Shekhar Kapoor, Rita Horner, William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

Aug 10, 2023/6 min read

What are AI Chips? A Comprehensive Guide to AI Chip Design

By Rob van Blommestein

Tags: AI & Machine Learning, Chip Design Insights, Design

Jul 26, 2023/4 min read

Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

By William Ruby

Tags: AI & Machine Learning, Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

Jul 21, 2023/6 min read

A Trillion-Dollar Industry: How AI Is Reinventing EDA and Semiconductors

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

Jul 19, 2023/5 min read

Can Photonics Power Next-Gen AI Chatbots?

By Twan Korthorst

Tags: AI & Machine Learning, Chip Design Insights, Design, Photonic, HPC, Data Center

Jul 19, 2023/10 min read

Introducing the FEY-Approach in Test Automation

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jul 18, 2023/5 min read

Key Considerations for Securing In-Vehicle Apps

By Chris Clark

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Automotive

Jul 11, 2023/3 min read

How STMicroelectronics and Microsoft are Using AI-Driven Technology to Optimize PPA

By Rob van Blommestein

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design

Jul 11, 2023/5 min read

New Synopsys Cloud 4.0 Delivers E-Commerce and ZeBu Cloud SaaS Flows for Greater Flexibility and Scalability

By Vikram Bhatia

Tags: Cloud, Product Spotlight, Chip Design Insights, Design

Jun 28, 2023/3 min read

The Lights Controller: Standard Example for Test Automation with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jun 21, 2023/5 min read

Designing Electrostatic Discharge (ESD) Protection for Monolithic SoCs and Multi-Die Systems

By Dermott Lynch

Tags: Multi-Die System, Chip Design Insights, Design, Design Technology Co-Optimization

Jun 13, 2023/4 min read

Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads

By Andy Tai, Ramesh Narayanaswamy

Tags: Multi-Die System, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center, Verification

Jun 13, 2023/5 min read

Leveraging Equivalence Classes for Testing with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jun 02, 2023/4 min read

Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics

By Guy Cortez

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design

May 31, 2023/6 min read

From Silicon Design to End of Life¡ªMitigate Memory Failures to Boost Reliability

By Anand Thiruvengadam, Guy Cortez

Tags: Memory, Chip Design Insights, Design

May 30, 2023/3 min read

Synopsys 2022 ESG Report: Building a Smart Future Together

By Erika Varga McEnroe

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Inside Synopsys

May 24, 2023/2 min read

What are Testlets? - Simplifying Software Testing with Testlets

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

May 19, 2023/5 min read

Why Designers are Using EDA Tools in the Cloud

By Vikram Bhatia

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Verification

May 09, 2023/6 min read

What Does the Future Hold for AI in Chip Design?

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

May 04, 2023/3 min read

Synopsys Acquires Silicon Frontline Technology

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Signoff, Inside Synopsys

May 02, 2023/4 min read

Understanding Assesslets: Innovative Test Documentation in Automotive Industry

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

May 01, 2023/4 min read

How AI Revolutionized EDA Tools and Silicon Chip Design

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification, Inside Synopsys

Apr 25, 2023/7 min read

Upgrading 3DIC Packaging for Faster AI Inference with PSMC

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design

Apr 23, 2023/1 min read

Testing Simulink Models on Linux with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Apr 20, 2023/2 min read

Get Certified in Semiconductor Engineering

By Anupama Shojaei

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Apr 19, 2023/5 min read

How AI Enhances EDA Tools and Chip Design

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

Apr 13, 2023/5 min read

SNUG Silicon Valley 2023: Catalyzing the Future for Our Smart Everything World

By Rob van Blommestein

Tags: Multi-Die System, AI & Machine Learning, Silicon Lifecycle Management, Test, Chip Design Insights, Design, Verification, Inside Synopsys

Mar 29, 2023/6 min read

Revolutionizing Chip Design with AI-Enabled EDA Tools

By Arvind Narayanan

Tags: AI & Machine Learning, Test, Chip Design Insights, Design, Verification

Mar 23, 2023/4 min read

Why AI Requires a New Chip Architecture

By Thomas Andersen

Tags: AI & Machine Learning, Chip Design Insights, Design

Mar 22, 2023/6 min read

SoC Design Verification and Chip Debug with AI

By Taruna Reddy, Robert Ruiz

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

Mar 17, 2023/2 min read

Discover the Latest in AI, EDA, and Multi-Die Systems

By Rob van Blommestein

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Silicon IP, Verification, Inside Synopsys

Mar 16, 2023/3 min read

How AI Will Change Chip Design

By Arvind Narayanan

Tags: AI & Machine Learning, Chip Design Insights, Design

Mar 09, 2023/5 min read

Optimizing the RTL Design Flow with Real-Time PPA Analysis

By Jim Schultz

Tags: RTL Synthesis, Product Spotlight, Debug, Chip Design Insights, Design, Verification

Mar 09, 2023/2 min read

Resolving PPA Issues with RTL Architect & Verdi Integration

By Synopsys Editorial Staff

Tags: RTL Synthesis, Design

Feb 23, 2023/4 min read

Fostering STEM Education Through Roadtrip Nation & PBS

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Manufacturing, Inside Synopsys

Feb 22, 2023/2 min read

Reduced Maintenance & Improved Quality in Software Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Feb 09, 2023/5 min read

Top 2023 AI Predictions: AI Apps & Chip Design Tools

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Feb 07, 2023/5 min read

Boosting Chip Design & Verification with AI EDA Tools

By Shankar Krishnamoorthy

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Verification

Feb 07, 2023/6 min read

Synopsys Custom Design Family Customer Testimonials

By Synopsys Editorial Staff

Tags: Customer Spotlight, Design

Feb 01, 2023/1 min read

Revolutionizing Optical SoC Design with Lightelligence

By Kamal Desai

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, Design

Jan 25, 2023/3 min read

Redefining Test Expectations with Synopsys TestMAX Family of Products: An Interview with Amit Sanghani

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jan 25, 2023/1 min read

Interview with Ypsomed

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jan 24, 2023/3 min read

Revolutionizing Pre-silicon Design Robustness Analysis with Li Ding

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jan 24, 2023/3 min read

Enabling Superior RTL with Synopsys RTL Architect: A Discussion with Vineet Rashingkar

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jan 22, 2023/3 min read

Solving Signal & Power Issues in High-Speed Data Centers?

By Pavani Jella

Tags: Chip Design Insights, Design

Jan 17, 2023/4 min read

Parameters: A Major Challenge in Automotive Software Development

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jan 11, 2023/4 min read

Navigating the Era of Autonomous Design for Powerful Compute with Hardware

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

Jan 10, 2023/6 min read

5 Cloud Predictions to Watch in 2023

By Vikram Bhatia, Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

Jan 09, 2023/5 min read

How Returnship Programs Provide New Career Opportunities?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Jan 08, 2023/9 min read

Achieving 100% Confidence in Requirement Verification Tests

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jan 03, 2023/6 min read

3 Key Technologies that Will Transform Electronic Design in 2023

By Sanjay Bali

Tags: Cloud, Multi-Die System, Silicon Lifecycle Management, Chip Design Insights, Design, 3DIC Compiler

Dec 20, 2022/11 min read

Introduction to Automotive Testing Terms

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Dec 19, 2022/10 min read

2022's EDA & Chip Design Advancements?

By Synopsys Editorial Staff

Tags: Multi-Die System, AI & Machine Learning, Prototyping, Emulation, Interface IP, Inside Synopsys, Cloud, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification

Dec 14, 2022/5 min read

Why Reliability, Availability & Serviceability Matter in HPC?

By Rita Horner, Pawini Mahajan, Charlie Matar

Tags: Chip Design Insights, Design, HPC, Data Center, Silicon IP

Dec 12, 2022/4 min read

How Digital Tools Speed Up Memory Chip Design & Verification?

By Farzin Rasteh, Preeti Jain, Anand Thiruvengadam, Jim Schultz

Tags: Memory, Chip Design Insights, Design, Verification

Dec 06, 2022/6 min read

How the Electronics Industry Can Shape a Sustainable World?

By Godwin Maben, Piyush Sancheti

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Energy-Efficient SoCs, Silicon IP, Verification

Dec 06, 2022/5 min read

5 Secret Hacks to Minimize Testing Efforts

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Nov 15, 2022/5 min read

Addressing the Chip Supply Shortage with Silicon Remastering?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Nov 15, 2022/10 min read

Preparing for Automotive SPICE Assessment: A Guide to Software Unit Verification

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Nov 14, 2022/3 min read

Streamlining Photonic Integrated Circuit Design with PDKs?

By Twan Korthorst

Tags: Chip Design Insights, Design, Manufacturing, Photonic

Nov 09, 2022/5 min read

How to Protect Advanced Chip Designs from Security Breaches?

By Ian Land

Tags: Aerospace & Government, Silicon Lifecycle Management, Prototyping, Chip Design Insights, Simulation, Design, Emulation, Silicon IP, Verification, Formal Verification

Nov 07, 2022/5 min read

Celebrating STEM Day with Advice from Early-Career R&D Engineers

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Nov 03, 2022/2 min read

The Importance of Unit Definition in the Testing Process with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Nov 02, 2022/4 min read

Library Characterization for Advanced Process Chip Designs?

By Moninder Bansal

Tags: Product Spotlight, Chip Design Insights, Design, Signoff

Oct 31, 2022/3 min read

Cloud-Based EDA Tools for Aerospace Chip Designers?

By Ian Land

Tags: Cloud, Aerospace & Government, Chip Design Insights, Design

Oct 27, 2022/7 min read

Why Sacrifice QoRs? Optimizing Design Signoff and Achieving Accurate Functional ECOs the Smarter Way

By Makarand Patil, Avinash Palepu

Tags: Product Spotlight, Chip Design Insights, Design, Signoff

Oct 18, 2022/6 min read

How Digital Twins are Transforming Aerospace & Defense?

By Jason Niatas, Marc Serughetti, Ian Land

Tags: Aerospace & Government, Chip Design Insights, Design, Verification

Oct 17, 2022/6 min read

How to Shift Memory Design Left with Machine Learning?

By Anand Thiruvengadam

Tags: AI & Machine Learning, Memory, Chip Design Insights, Design

Oct 13, 2022/1 min read

Regression vs. Back-to-Back Testing: Which One to Choose in TPT?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Oct 10, 2022/5 min read

The Next Era of Chip Design Starts with Machine Learning?

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Silicon Lifecycle Management, Chip Design Insights, Design, Energy-Efficient SoCs

Sep 27, 2022/4 min read

Unifying Timing Constraints with FishTail Design Automation?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Signoff, Verification

Sep 26, 2022/1 min read

Automating Test Automation with TPT API

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Sep 20, 2022/1 min read

SNUG Israel 2022 Spotlights Talks on Silicon Design, Verification, and IP 91³Ô¹ÏÍø for AI, Cloud and Automotive

By Isaac Zafrany

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Automotive, Silicon IP, Verification, Inside Synopsys

Sep 20, 2022/3 min read

Setting Up Scenarios for SOTIF in TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Sep 14, 2022/4 min read

Enabling Edge Machine Learning Applications with SiMA.ai?

By Stelios Diamantidis

Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Chip Design Insights, Design, Emulation, Signoff, Silicon IP, Verification

Sep 11, 2022/2 min read

AI-Driven Debug Automation Speeds Up Root-Cause Analysis?

By Rob van Blommestein

Tags: AI & Machine Learning, Debug, Chip Design Insights, Design, Verification

Aug 30, 2022/3 min read

How to Accelerate the SoC Design Flow with AI-Enabled Kits?

By Paul Holt, Frank Gover, Gary Rudolph

Tags: AI & Machine Learning, Chip Design Insights, Design, 5G Wireless, Automotive, Silicon IP

Aug 24, 2022/5 min read

Why DTCO is Critical to Modern Memory Design Techniques?

By Anand Thiruvengadam, Ricardo Borges

Tags: Custom Implementation, Chip Design Insights, Design, Design Technology Co-Optimization

Aug 11, 2022/6 min read

Reflecting on the 59th Design Automation Conference (DAC)

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, Inside Synopsys

Aug 09, 2022/6 min read

Accelerate SoC Design Flow with Functional ECO?

By Makarand Patil, Avinash Palepu

Tags: Product Spotlight, Chip Design Insights, Design, Signoff

Aug 08, 2022/6 min read

Top Medical Device Design Priorities & Chip Design Process?

By Godwin Maben, Piyush Sancheti, Hany Elhak

Tags: Medical, Chip Design Insights, Design

Jul 25, 2022/4 min read

Returning to Work After A Career Break: RIYA Returnship?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Jul 19, 2022/6 min read

What is Silicon Lifecycle Management (SLM)? - Evolving PLM?

By Steve Pateras

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design, Manufacturing

Jul 11, 2022/5 min read

What is a SmartNIC?

By Rita Horner

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Security IP, Foundation IP, HPC, Data Center, Silicon IP, Verification, 3DIC Compiler

Jul 05, 2022/5 min read

Logic Synthesis & Chip Design: Q&A with Luca Amaru, R&D Engineer?

By Synopsys Editorial Staff

Tags: RTL Synthesis, Chip Design Insights, Design, Inside Synopsys

Jul 05, 2022/4 min read

DAC 2022: A Glimpse into the World of Design Automation from the Cloud to Cryogenic Computing

By Rob van Bloomestein

Tags: Cloud, Chip Design Insights, Design, Silicon IP, Verification, Inside Synopsys

Jul 03, 2022/1 min read

5 Reasons for Testing Simulink with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jun 27, 2022/11 min read

Improving Semiconductor Yield with Test Data Analytics?

By Randy Fish, Guy Cortez

Tags: Customer Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design

Jun 15, 2022/5 min read

Adding Semiconductor Engineering Degree Programs at Purdue?

By Patrick Haspel

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Jun 13, 2022/3 min read

Fostering Engineering Education: Analog IC Design Contest?

By Srinivas Macha

Tags: Custom Implementation, Chip Design Insights, Design, Inside Synopsys

Jun 09, 2022/4 min read

Synopsys Internship Program FAQs: Student Tech Internships?

By Anna Tabet

Tags: AI & Machine Learning, Design, Inside Synopsys

Jun 06, 2022/6 min read

How Chip Floorplan Design Automation Accelerates Chip Design?

By Preeti Jain

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, Design, Manufacturing, HPC, Data Center

Jun 01, 2022/2 min read

How to Drastically Enhance Analog Layout Efficiency Using a Highly Reusable User-Defined Device

By Synopsys Editorial Staff

Tags: Design, Analog Design

May 31, 2022/6 min read

Machine Learning Uncovers Chip Design Insights?

By Mark Richards

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design, Manufacturing

May 30, 2022/2 min read

AI-Enabled Chip Design Tools: Synopsys AI Podcast?

By Geetha Rangarajan

Tags: AI & Machine Learning, Chip Design Insights, Design

May 18, 2022/6 min read

AI Chip Design Breakthroughs at SNUG Silicon Valley 2022?

By Geetha Rangarajan

Tags: AI & Machine Learning, Chip Design Insights, Design, Inside Synopsys

May 05, 2022/6 min read

Optical Design's Role in Space: National Space Day 2022?

By Blake Crowther

Tags: Aerospace & Government, Chip Design Insights, Design

May 03, 2022/1 min read

Hardware-in-the-Loop (HiL) Testing with TPT and ASAM XiL

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Apr 25, 2022/1 min read

Introducing Markup in TPT18: Enhance Your Test Case Clarity

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Apr 19, 2022/1 min read

Speed Up Simulink in Rapid Accelerator Mode

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Apr 13, 2022/4 min read

Catalyzing the Impossible ¨C When Semiconductor Design Gets Its SaaS On

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, Verification, Inside Synopsys

Apr 03, 2022/2 min read

Top-Level Interconnect Planning and Implementation using Synopsys IC Compiler II

By Jiangtao Meng

Tags: Design, Physical Implementation

Mar 22, 2022/7 min read

2022: The Year of Cloud-Based Chip Design & Verification?

By Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

Mar 20, 2022/1 min read

Formal Requirements vs. Natural Language Requirements

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Mar 16, 2022/3 min read

SRAM Margin Analysis Workflow

By Synopsys Editorial Staff

Tags: Design

Mar 14, 2022/2 min read

SNUG Silicon Valley 2022: Synopsys Users Group?

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification, Inside Synopsys

Mar 14, 2022/8 min read

Why the James Webb Space Telescope Is the Next Best Thing to Time Travel

By Mark Kahan

Tags: Aerospace & Government, Design, CODE V, Optical

Feb 22, 2022/7 min read

Enabling AI Chip Design with Specialized SoC IP 91³Ô¹ÏÍø?

By Ron Lowman

Tags: AI & Machine Learning, Chip Design Insights, Design, Silicon IP

Feb 20, 2022/3 min read

MC/DC Coverage: The Struggle of Reaching 100% Coverage

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Feb 16, 2022/6 min read

How to Design SoCs for the SysMoore Era?

By Dr. Ming Zhang

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, 3DIC Compiler

Feb 10, 2022/4 min read

Celebrating International Day of Women & Girls in Science?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Silicon IP, Inside Synopsys

Feb 08, 2022/4 min read

Powering Circuit Simulation Software with NVIDIA GPUs?

By Samad Parekh

Tags: Customer Spotlight, Chip Design Insights, Design, Signoff, Customer

Feb 01, 2022/6 min read

AI Chip Design Enables Breakthroughs for Chip Makers?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Jan 31, 2022/4 min read

Advancing STEM Education & Research with EDA Tools?

By Synopsys Editorial Staff

Tags: TCAD, Chip Design Insights, Design, Manufacturing, Verification, Inside Synopsys

Jan 26, 2022/3 min read

A New World of Tech Innovation?

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification, Inside Synopsys

Jan 19, 2022/7 min read

The Future of High-Performance Computing: Key Predictions for 2022

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Verification

Jan 12, 2022/2 min read

AI Chip Design: How SoCs are Designed for AI Applications?

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Verification

Jan 05, 2022/5 min read

AI Predictions 2022: Applications & Trends in AI Chip Design?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Jan 04, 2022/1 min read

What is Processor-in-the-Loop (PiL) Testing?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Dec 19, 2021/4 min read

Where Does Innovation Come From??

By Mike Gianfagna

Tags: Chip Design Insights, Design, Manufacturing, Silicon IP, Verification, Inside Synopsys

Dec 15, 2021/2 min read

Hyper-Convergent Chip Designs: News & Trends?

By Synopsys Editorial Staff

Tags: Multi-Die System, Chip Design Insights, Design, HPC, Data Center

Dec 13, 2021/4 min read

Happy 40th, HSPICE! Looking Forward to the Next 40 Years of Circuit Simulation Innovation

By Anand Thiruvengadam, Tao Huang

Tags: Product Spotlight, Chip Design Insights, Design

Dec 08, 2021/5 min read

Maximizing Silicon Design & Chip Performance with Concertio?

By Synopsys Editorial Staff

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design, Manufacturing

Dec 07, 2021/5 min read

Memory Chip Design: Tools & Challenges?

By Anand Thiruvengadam

Tags: AI & Machine Learning, Memory, Chip Design Insights, Design, Manufacturing, Internet of Things

Dec 06, 2021/6 min read

What is Photonics? - Fundamentals & Applications?

By Twan Korthorst

Tags: Data Center, AI & Machine Learning, Chip Design Insights, Design, Photonic, Consumer, Optical

Dec 01, 2021/2 min read

What is Software-in-the-Loop (SiL) Testing?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Nov 29, 2021/4 min read

What is Democratized Design? - Chip Design Process

By Synopsys Editorial Staff

Tags: Multi-Die System, Chip Design Insights, Design

Nov 17, 2021/4 min read

How Silicon Lifecycle Management Enables Smarter Chip Design

By Steve Pateras

Tags: Silicon Lifecycle Management, Chip Design Insights, Design

Nov 08, 2021/8 min read

What is Quantum Computing? - Applications & Challenges?

By Kenneth Larsen

Tags: AI & Machine Learning, Chip Design Insights, Design, Photonic, Optical, 3DIC Compiler

Nov 01, 2021/6 min read

What are Counterfeit Chips?

By Mike Borza

Tags: Chip Design Insights, Design

Oct 19, 2021/3 min read

Digital Design Technology Symposium 2021?

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

Oct 11, 2021/3 min read

2021 ERI Summit & Microsystems Technology Office Symposium?

By Ian Land

Tags: Aerospace & Government, Silicon Lifecycle Management, Chip Design Insights, Design, Design Technology Co-Optimization, Silicon IP, 3DIC Compiler

Oct 04, 2021/8 min read

Unified Power Format Expands Low-Power IC Design?

By Nikhil Amin, Harsha Vardhan

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Sep 29, 2021/5 min read

Hyper-Convergent Chip Design Tools Power SoC Innovation?

By Shekhar Kapoor, Mark Richards

Tags: Chip Design Insights, Design, 3DIC Compiler

Sep 28, 2021/4 min read

AI Chip Design Tools Deliver Autonomous Insights?

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design

Sep 26, 2021/3 min read

Enabling IC Design Reliability Analysis: PrimeSim Continuum?

By Synopsys Editorial Staff

Tags: Product Spotlight, Chip Design Insights, Design

Sep 23, 2021/4 min read

Improving Robustness and Minimizing Over-Pessimism in the Face of Rising Design Variability

By Rahul Deokar

Tags: Design

Sep 14, 2021/5 min read

High-Performance Computing Drives Demand for Chiplets

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, HPC, Data Center, Silicon IP

Sep 08, 2021/4 min read

EDA Tools Help Students Build IC Design Skills?

By Synopsys Editorial Staff

Tags: Custom Implementation, Physical Verification, Chip Design Insights, Design, Signoff, Inside Synopsys

Sep 07, 2021/1 min read

Achieving Functional Safety and High-Reliability Design with Synplify Tool

By Synopsys Editorial Staff

Tags: Design, FPGA Design

Aug 23, 2021/3 min read

PrimeShield Design Robustness Analysis and ECO Overview

By Sahil Bargal

Tags: Design

Aug 19, 2021/2 min read

Improving Design Robustness with PrimeShield: A Discussion with Li Ding

By Synopsys Editorial Staff

Tags: Design, Signoff, Inside Synopsys

Aug 18, 2021/4 min read

Will AI Chip Design Tools Take Your Job??

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design

Aug 09, 2021/5 min read

What is a Multi-Die Chip Design?

By Kenneth Larsen, Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, Silicon IP

Aug 04, 2021/2 min read

Technical Features of StarRC Merge Corners

By Synopsys Editorial Staff

Tags: Design

Jul 28, 2021/6 min read

Improved Power System Optimization for SoC Designs?

By Jay Roy

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Jul 26, 2021/3 min read

Aaroh Labs Advanced-Node Semiconductor Designs?

By Rob van Bloomestein

Tags: Customer Spotlight, Chip Design Insights, Design, Internet of Things, HPC, Data Center, Verification

Jul 14, 2021/5 min read

Powering the AI Chip Design Process with AI?

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design

Jul 13, 2021/5 min read

3DIC Design Optimization for Power, Performance & Area?

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design

Jul 09, 2021/3 min read

Innovations in Formality Equivalence Checking: An Interview with Todd Buzan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 09, 2021/4 min read

Achieving the Best Arm PPA: A Discussion with Sudhakar Jilla

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 09, 2021/4 min read

Designing AI Chips: A Conversation with Thomas Andersen

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Design, Inside Synopsys

Jul 08, 2021/5 min read

Interview with Weikai Sun: Enhancing Custom Design Productivity with Synopsys Custom Design Platform

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 08, 2021/3 min read

Insight into the Arm-Synopsys Collaboration: Interview with Deirdre Hanford

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 08, 2021/5 min read

Understanding the Role of AI in Chip Design: A Discussion with Synopsys' ML CoE

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Design, Inside Synopsys

Jul 08, 2021/5 min read

Addressing Advanced Node Challenges with PrimeTime?: An Interview with Feroze Taraporevala

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 08, 2021/3 min read

ESP Equivalence Checking in Custom Design: An Interview with Almitra Pradhan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 08, 2021/4 min read

Extraction for Custom Design & Advanced Nodes: A Conversation with Mo Movahed-Ezazi

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 08, 2021/3 min read

Minimizing Late-stage Functional ECOs: A Discussion with Todd Buzan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 07, 2021/5 min read

How PrimeSim Continuum is Transforming SoC Design: Insights from Hany Elhak

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Jul 06, 2021/5 min read

How Emulation Helps Find Power Bugs During SoC Verification?

By Alex Wakefield

Tags: Static Verification, Chip Design Insights, Simulation, Design, Emulation, Energy-Efficient SoCs, Signoff, Verification, Virtual Prototyping, Formal Verification

Jul 06, 2021/3 min read

StarRC?: Enhancing Custom SoC Design with Advanced Features

By Synopsys Editorial Staff

Tags: Design

Jun 29, 2021/5 min read

Semiconductors & Chip Design Drive Global Innovation?

By Mike Gianfagna

Tags: Chip Design Insights, Design, Manufacturing, Verification

Jun 28, 2021/3 min read

Resistance Extraction with StarRC

By Senthil Annamalai

Tags: Design, Signoff

Jun 15, 2021/5 min read

Enhancing Chip Design with Artificial Intelligence?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Jun 09, 2021/7 min read

The Importance of Chip Design Data & Analytics?

By Guy Cortez

Tags: Smart Manufacturing, Silicon Lifecycle Management, Chip Design Insights, Design, Manufacturing

May 25, 2021/4 min read

Faster Chiplet & SoC Design: Collaboration with Arm?

By Michael Posner, Neel Desai

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, 5G Wireless, Interface IP, HPC, Data Center, Silicon IP, Verification

May 18, 2021/5 min read

Hyper-Convergent Chip Designs: All or Nothing Approach?

By Mike Gianfagna

Tags: Chip Design Insights, Design, HPC, Data Center

May 12, 2021/9 min read

Low Power Q&A with Dr. Renu Mehra, R&D Group Director

By Synopsys Editorial Team

Tags: Chip Design Insights, Design, Energy-Efficient SoCs

May 09, 2021/1 min read

Fault Injection Testing Methods with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

May 09, 2021/5 min read

Fusion Compiler's Golden-Signoff Backbone: An Interview with Neeraj Kaul

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

May 05, 2021/5 min read

On-the-Fly Code Review Maximizes Chip Design Process

By Kiran Vittal

Tags: Chip Design Insights, Design, Verification

May 05, 2021/1 min read

Verifying Hyper-Convergent Systems with PrimeSim Continuum

By Synopsys Editorial Staff

Tags: Design, AMS Simulation

May 04, 2021/5 min read

How 5G Infrastructure Accelerates Smart City Projects

By Ron Lowman

Tags: Chip Design Insights, Design, 5G Wireless, Internet of Things, Silicon IP, Verification

Apr 29, 2021/4 min read

PrimeLib? Next-Generation Library Characterization: A Discussion with Moninder Bansal

By Synopsys Editorial Staff

Tags: Design, Signoff, Inside Synopsys

Apr 28, 2021/5 min read

Safeguarding Automotive Sensors for Automotive Safety

By Samantha Beaumont

Tags: Prototyping, Chip Design Insights, Design, Automotive, Silicon IP, Verification

Apr 22, 2021/2 min read

Advancing IC Design with PrimeSim Continuum

By Synopsys Editorial Staff

Tags: Design

Apr 20, 2021/3 min read

Library Characterization Tool for Advanced Node SoC Design?

By Umang Doshi

Tags: Multi-Die System, Product Spotlight, Chip Design Insights, Design, Signoff

Apr 19, 2021/5 min read

PrimeSim Continuum's Enables IC Hyperconvergence?

By Tom Hsieh

Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Chip Design Insights, Design

Apr 14, 2021/4 min read

FPGA Prototyping Powers the SoC Design & Verification Process

By Dr. Johannes Stahl

Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Prototyping, Chip Design Insights, Design, 5G Wireless, Verification

Apr 13, 2021/4 min read

Advancing AI Chip Design with IBM's Hybrid Cloud Architecture

By Arun Venkatachar

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

Apr 12, 2021/4 min read

Updated NHTSA Automotive Cybersecurity Best Practices

By Jacob Wilson

Tags: Chip Design Insights, Design, Automotive

Apr 11, 2021/2 min read

Beyond Functional Testing: The TASMO Approach

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Apr 06, 2021/4 min read

Integrated Chip Design Tools for IC Hyperconvergence

By Raja Tabet, Anand Thiruvengadam

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Silicon IP

Mar 28, 2021/1 min read

Testing ASCET-DEVELOPER Models with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Mar 25, 2021/4 min read

ANSYS-Synopsys Collaboration: Q&A with John Lee and Jacob Avidan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Mar 25, 2021/5 min read

Life Beyond 3nm: A Discussion with Jacob Avidan and Shankar Krishnamoorthy

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Mar 25, 2021/1 min read

RF Designs Acceleration Using Keysight PathWave ADS

By Damian Roberts

Tags: Design

Mar 24, 2021/4 min read

Spotlight on Custom Compiler: An Exclusive 1:1 with Aveek Sarkar, VP of Engineering at Synopsys

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Mar 24, 2021/3 min read

Automotive Innovation Trends and Challenges: An Interview with Dr. Burkhard Huhnke

By Synopsys Editorial Staff

Tags: Design, Automotive, Inside Synopsys

Mar 24, 2021/3 min read

IC Validator for Advanced-node Signoff: Interview with Christen Decoin

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Mar 24, 2021/4 min read

Insights on Custom Routing: An Interview with Avina Verma

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Mar 16, 2021/4 min read

Emulation Technology for Faster SoC Power Verification?

By Dr. Johannes Stahl

Tags: AI & Machine Learning, Chip Design Insights, Design, Emulation, 5G Wireless, Energy-Efficient SoCs, Signoff, Verification

Mar 15, 2021/1 min read

ESP Bridging the Gap Video Series: Formal Verification for Custom Digital Design

By Synopsys Editorial Staff

Tags: Design

Mar 14, 2021/7 min read

Optimizing Signal Distribution in FPGAs: A Guide to Automation with HAPS ProtoCompiler

By Christoph Kuznik, Rutger Carlsson

Tags: Prototyping, Design

Mar 04, 2021/5 min read

Future of Automotive Sensor Fusion & Data Handling?

By Chris Clark

Tags: Chip Design Insights, Design, Automotive, Verification

Mar 03, 2021/5 min read

How 3DIC Design Tools Enhance Productivity & Performance?

By Shekhar Kapoor, Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design, 3DIC Compiler

Feb 18, 2021/2 min read

StarRC Standalone Netlist Reducer: Achieving Practical Simulation Times

By Senthil Annamalai

Tags: Design, Signoff

Feb 07, 2021/1 min read

Boundary Value Testing Methods in TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jan 31, 2021/1 min read

Testing AUTOSAR Software Components with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jan 24, 2021/2 min read

Effective Requirements-Based Testing Strategies with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Jan 19, 2021/4 min read

Meeting Auto Safety Standards with EDA Tools & IP 91³Ô¹ÏÍø?

By Meirav Nitzen, Swami Venkat

Tags: Chip Design Insights, Design, Automotive, Silicon IP, Verification

Jan 13, 2021/4 min read

5 Key Smart Technology Innovations?

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Emulation, 5G Wireless, Internet of Things, Interface IP, Virtual Prototyping, Cloud, Chip Design Insights, Design, Security IP, Automotive, Silicon IP, Verification

Jan 12, 2021/4 min read

Chip Design: AI & IoT's Impact on Power Consumption?

By Godwin Maben

Tags: Chip Design Insights, Design, Energy-Efficient SoCs

Jan 06, 2021/3 min read

AI Hardware Accelerates Innovation?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design, Silicon IP

Jan 05, 2021/5 min read

Predictions for the Automotive Industry 2021?

By Dennis Kengo Oka, Chris Clark

Tags: AI & Machine Learning, Chip Design Insights, Design, Automotive

Dec 15, 2020/7 min read

High-Performance Computing & Cloud Predictions for 2021?

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center

Dec 12, 2020/1 min read

ADAS Testing with TPT: Scenario-Based Strategies and Validation

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Nov 23, 2020/1 min read

Back-to-Back MiL-SiL-PiL Testing with TPT: Aligning Development Phases

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Nov 12, 2020/2 min read

Analog Fault Simulation with Synopsys Custom Design Platform

By Kai Wang

Tags: Design

Nov 09, 2020/2 min read

ESP Technology: High Coverage Symbolic Verification

By Synopsys Editorial Staff

Tags: Design

Oct 27, 2020/3 min read

Harnessing Machine Learning to Boost ECO Optimization and Overcome PPA Challenges

By Shekhar Kapoor

Tags: AI & Machine Learning, Design

Oct 21, 2020/1 min read

Model-in-Loop Testing with TPT: Efficient Simulink Model Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Oct 20, 2020/4 min read

Defining the AI Era with the IBM Research AI Hardware Center?

By Arun Venkatachar

Tags: Multi-Die System, AI & Machine Learning, Emulation, Interface IP, Virtual Prototyping, Chip Design Insights, Design, Manufacturing, Design Technology Co-Optimization, Processor 91³Ô¹ÏÍø, Silicon IP, Verification, 3DIC Compiler

Oct 18, 2020/2 min read

The Evolution of Synthesis: Navigating Complex Process and Layout Rules in the FinFET Era

By Synopsys Editorial Staff

Tags: Design

Oct 11, 2020/4 min read

A New Approach to SoC Design with Silicon Lifecycle Management?

By Steve Pateras

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design

Oct 08, 2020/5 min read

How Does EDA Form the Basis for Designing Secure Systems?

By Brandon Wang, Adam Cron

Tags: Design

Oct 08, 2020/3 min read

Is 'Good Enough For Government Work' Still Sufficient? Not Anymore

By Ruben Molina

Tags: Design

Oct 07, 2020/3 min read

Revolutionizing ASIC Flows: The Power and Beauty of Early Stage In-Design Rail Analysis

By Synopsys Editorial Staff

Tags: Design

Sep 23, 2020/4 min read

Impact of Low Power Design on Smart Edge IoT & Machine Learning?

By Pieter van der Wolf

Tags: AI & Machine Learning, Chip Design Insights, Design, Internet of Things, Energy-Efficient SoCs

Sep 15, 2020/2 min read

StarRC VMF vs. IC Validator AMF Positioning: Balancing Chip Performance

By Nitin Kalra

Tags: Design

Sep 01, 2020/1 min read

PEGASUS Project: Advanced Automated Driving Tests with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Aug 25, 2020/2 min read

StarRC Density Corner Value Proposition

By Nitin Kalra

Tags: Design, Signoff

Jul 22, 2020/4 min read

Accelerating EDA with AI for Improved SoC?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Jul 22, 2020/1 min read

TPT Autotester vs. TPT Dashboard: What's the Difference?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

May 25, 2020/2 min read

ADAS NCAP AEB Tests Made Easy

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Apr 29, 2020/2 min read

Exploring PrimeTime Technologies for Digital Design

By Synopsys Editorial Staff

Tags: Design

Apr 23, 2020/2 min read

The Breakthrough Technology Behind RTL Architect

By Synopsys Editorial Staff

Tags: Design

Apr 09, 2020/7 min read

Getting Better Results Faster with the Singular RTL-to-GDSII Product

By Shekhar Kapoor, Mark Richards

Tags: Design, Physical Implementation

Mar 16, 2020/2 min read

Understanding Predictive RTL Design Closure with RTL Architect

By Shankar Krishnamoorthy

Tags: Design

Mar 12, 2020/6 min read

Why AI Hardware Demands the Highest Verifiable QoR

By Bradley Geden

Tags: AI & Machine Learning, Design

Dec 20, 2019/6 min read

Functional Safety (FuSa) Implementation Goes Mainstream

By Mary Ann White

Tags: Design, Automotive

May 07, 2019/1 min read

TestMAX: Test All the Limits

By Synopsys Editorial Staff

Tags: Design, Test Automation

Nov 16, 2018/1 min read

Advancing Node Ready Synthesis with Design Compiler NXT

By Abhijeet Chakraborty

Tags: Design

Nov 05, 2018/1 min read

Introducing Fusion Compiler & Design Compiler NXT: Synopsys' Digital Toolset Evolution

By Synopsys Editorial Staff

Tags: Design

Nov 05, 2018/1 min read

Introducing Fusion Compiler: A Unified Synthesis and Place and Route Solution

By Shankar Krishnamoorthy

Tags: Design, Physical Implementation

Sep 17, 2018/2 min read

Transistor Architectures for 5-nm Node and Beyond

By Victor Moroz

Tags: Design

Jun 20, 2016/2 min read

Custom Compiler In-Design Assistants (Part 2): Advanced Design Integration

By Synopsys Editorial Staff

Tags: Design

May 24, 2016/2 min read

Custom Compiler In-Design Assistants (Part 1): Enhancing Workflow Efficiency

By Synopsys Editorial Staff

Tags: Design

May 03, 2016/1 min read

Custom Compiler Layout Assistants: Streamlining Design Processes

By Synopsys Editorial Staff

Tags: Design