Cloud native EDA tools & pre-optimized hardware platforms
The Synopsys ARC? Processor IP portfolio consists of ARC-V? RISC-V based processors, proven 32-/64-bit CPU IP, DSP IP, Neural Network Processing Unit (NPU) IP, subsystems and software development tools. ARC processors are supported by a broad spectrum of 3rd-party tools, operating systems and middleware from leading industry vendors enrolled in the ARC Access Program, as well as a comprehensive suite of free and open-source software available through the embARC Open Software Platform. Synopsys offers the ASIP Designer? tool for automating the design and implementation of application-specific instruction-set processors (ASIPs). ASIP Designer enables designers to create custom processors and programmable hardware accelerators for specialized processing requirements.
Keynote by Rich Collins @ RISC-V Summit NA
Training videos provide the deep dive technical content that has been delivered in onsite customer training over the course of three days.
Synopsys offers a full suite of development tools, ARC systems, and OS, providing all you need for ARC processor software development.