Cloud native EDA tools & pre-optimized hardware platforms
The Synopsys ARC? Processor IP portfolio consists of ARC-V? RISC-V based processors, proven 32-/64-bit CPU IP, DSP IP, Neural Network Processing Unit (NPU) IP, subsystems and software development tools. ARC processors are supported by a broad spectrum of 3rd-party tools, operating systems and middleware from leading industry vendors enrolled in the ARC Access Program, as well as a comprehensive suite of free and open-source software available through the embARC Open Software Platform. Synopsys offers the ASIP Designer? tool for automating the design and implementation of application-specific instruction-set processors (ASIPs). ASIP Designer enables designers to create custom processors and programmable hardware accelerators for specialized processing requirements.
Achieve maximum performance with minimum power and area consumption
Optimize PPA of each processor instance
Make application-specific customizations
Achieve faster time to market
Complete suite of commercial and open-source development tools and OSes for ARC and ARC-V based SoCs
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