Cloud native EDA tools & pre-optimized hardware platforms
Synopsys ARC NPX6 NPU IP addresses the demands of real-time compute with ultra-low power consumption for AI applications. To accelerate application software development for the ARC NPX6 NPU IP, the ARC MetaWare MX Development Toolkit provides a comprehensive compilation environment with automatic neural network algorithm partitioning to maximize resource utilization.
The enhanced Synopsys ARC? NPX Neural Processing Unit (NPU) IP family delivers the industry¡¯s highest performance and support for the latest, most complex neural network models, including generative AI. The Synopsys ARC NPX6 NPU IP features up to 96K MACs with enhanced utilization, new sparsity features and new interconnect for scalability that address the demands of real-time compute with ultra-low power consumption for AI applications.
The Synopsys NPX6 NPU IP has been enhanced to improve transformer performance and reduce consumption. A data compression option featuring OCP MX microscaling datatypes is now available to reduce bandwidth especially for large language models (LLMs) and other Generative AI models with significant parameters to process.
A single instance of the Synopsys ARC NPX6 NPU IP delivers up to 250 TOPS at 1.3 GHz on 5nm processes in worst-case conditions, or up to 440 TOPS by using new sparsity features that can increase the performance and decrease energy demands of executing a neural network. Both the NPU IP and the new MetaWare MX Development Toolkit integrate connectivity features that enable implementation of multiple NPU instances to achieve up to 3,500 TOPS performance on a single SoC.
Neural Processor IP for Functional Safety
The Synopsys ARC NPX6FS NPU IP meets stringent random hardware fault detection and systematic functional safety development flow requirements to achieve up to ISO 26262 ASIL D compliance. The processors, with comprehensive safety documentation included, feature dedicated safety mechanisms for ISO 26262 compliance and address the mixed-criticality and virtualization requirements of next-generation zonal architectures.
High-Productivity Software Tools
The ARC MetaWare MX Development Toolkit includes compilers and debugger, neural network software development kit (SDK), virtual platforms SDK, runtimes and libraries, and advanced simulation models. MetaWare MX offers a single toolchain to accelerate application development and automatically partitions algorithms across the MAC resources for highly efficient processing. For safety-critical automotive applications, the MetaWare MX Development Toolkit for Safety includes a safety manual and a safety guide to help developers meet the ISO 26262 requirements and prepare for ISO 26262 compliance testing.
The ARC NPX6 NPU IP scales from 1K to 96K MACs and supports a wide range of neural networks, including CNNs, RNNs/LSTMs, and emerging networks such as transformers and generative AI. It offers INT 4/8/16 bit resolution with optional BF16 and FP16 support.
The ARC NPX6FS NPU IP for Functional Safety offers all the features of the NPX6 NPU and adds a dual-core lockstep processor, a self-checking safety monitor, support up to ASIL D, and support for virtualization.
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NPX6 |
NPX6FS |
MACs |
1,024 ¨C 98,304 |
1,024 ¨C 98,304 |
L2 Shared Memory |
0 ¨C 64 MB |
0 ¨C 64 MB |
L2 Controller |
? |
? |
Tensor Accelerator |
? |
? |
Tensor Floating Point Unit (FPU) |
Optional |
Optional |
Trace |
? |
? |
Memory Management Unit (MMU) |
? |
? |
Functional Safety |
? | ASIL B/D |