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Synopsys¡¯ ARC? Classic processor IP portfolio includes processors based on the flexible and proven 32-/64-bit ARCv2 and ARCv3 instruction set architecture (ISA) with features optimized for a broad range of embedded and deeply embedded applications, including functional safety support up to ASIL-D. It is complemented with ARC-based subsystems and software development tools.
Key Benefits
Power & Area Efficient
Achieve maximum performance with minimum power and area consumption
Configurable
Optimize PPA of each processor instance
Extensible
Make application-specific customizations
ARC Classic Processor 91³Ô¹ÏÍø
ARC EM
Ultra-compact cores for power-critical and area-sensitive embedded and deeply embedded applications
Learn MoreARC HS
High-Performance processors optimized for GHz+ operating speeds with minimum area and power consumption
Learn MoreARC SEM
Performance-efficient, ultra-low power, compact processors enables integration of security into SoCs to protect against logical, hardware and physical attacks
Learn MoreARC Tools and Ecosystem
Complete suite of commercial and open-source development tools and OSes for ARC and ARC-V based SoCs
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