Cloud native EDA tools & pre-optimized hardware platforms
The Synopsys ARC? EM Family, based on the ARCv2 instruction set architecture (ISA) includes ARC EM4 and EM6, DSP-enhanced EMxD processors, and ASIL compliant EM functional safety processors.
The ultra-compact EM cores feature excellent code density, small size and very low power consumption, making them ideal for power-critical and area-sensitive embedded and deeply embedded applications.
The ARC EM processors are supported by a broad ecosystem of commercial and open-source tools, operating systems and middleware. This includes offerings from leading industry vendors who are members of the ARC Access Program as well as a comprehensive suite of free and open source software available through the embARC.org website.
For embedded applications requiring high performance with minimal power consumption, these solutions offer performance-efficient RISC cores, minimal power and area usage, and excellent code density.
For embedded applications needing DSP performance and low power consumption, these solutions feature combined RISC + DSP processors, over 150 DSP instructions, and easy DSP programming support.
For DSP-intensive functions like sensor fusion, voice detection, speech recognition, and audio processing, these solutions offer XY multi-banked memory, fixed-point vector/SIMD DSP support, and a low-power unified 32x32 MUL/MAC unit.
Ultra-compact core designed for low-power, safety-critical automotive applications, featuring a dual-core lockstep processor, self-checking safety monitor, and support for safety levels up to ASIL D.
ARC Software Development Platforms:
ARC Development Tools and Software:
ARC processors are optimized to deliver the best PPA efficiency in the industry for embedded SoCs.
ARC processors are highly configurable, allowing designers to optimize the performance, power, and area of each processor instance on their SoC.
ARC Processors EXtension (APEX) technology enables users to customize their processor implementation.