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As you¡¯re developing your chip, imagine the time and effort saved if you got almost-instant answers to questions about your electronic design automation (EDA) tools, right from your fingertips. No more searching through software manuals or sifting through other online resources in the middle of your project. Look ahead into the near future and picture being able to get deeper, more prescriptive insights to help you deliver even better chips, faster.
That future is closer than you think.
With the introduction of Synopsys.ai Copilot, Synopsys is harnessing the power of generative AI (GenAI) to bolster design teams with new levels of productivity. Integrated into the full Synopsys EDA stack, Synopsys.ai Copilot is the world¡¯s first GenAI capability for chip design. Trained on the trusted materials that you rely on today, the technology collaborates with engineers on their everyday workflows. What¡¯s more, as Synopsys.ai Copilot learns from your projects, it will eventually be able to deliver more meaningful guidance based on your organization¡¯s best practices and institutional knowledge.
¡°Microsoft partners with EDA solution providers to enable us to quickly integrate innovation from across the industry,¡± said Silvian Goldenberg, general manager, Silicon Development CAD at Microsoft. ¡°Our engineering teams worked closely with Synopsys on the development of Synopsys.ai Copilot and plan to apply its generative AI to workflows like formal verification to increase accessibility and reduce the time from ideation to design.¡±
AI-driven chip design is shaping the semiconductor industry in remarkable ways. The integration of GenAI capabilities is just the latest step in the journey to drive greater productivity in an environment of deeper challenges. Read on to learn more about where this latest phase in AI-driven chip design might take you.
Freeing Up Time for Product Differentiation
Semiconductors have become increasingly complex in the face of compute-intensive applications such as AI, high-performance computing, and autonomous automotive. Vertically stacked multi-die systems, devices featuring billions of transistors, and angstrom-scale structures are making waves across the industry. At the same time, just when their expertise is in such great demand, an engineering talent shortage is threatening to stall the innovation that has led us where we are now.
AI provides a solution, taking on repetitive tasks to free engineers to focus on product differentiation. Tapping into transformer architecture in large language models (LLMs), GenAI in particular can accomplish in seconds what would take someone hours or even days.
Synopsys.ai Copilot brings GenAI to the design engineering masses. Regardless of their level of experience, every designer can take their productivity up across every phase in the chip design cycle. It¡¯s like having an expert guide at your fingertips. Initially, Synopsys.ai Copilot will serve as a knowledge query system, pulling from Synopsys resources such as product user manuals, application notes, videos, and any documentation found on the . Queries can range from simple questions (¡°Which option should I use?¡±) to more complex and specific questions that might entail follow-up questions by Copilot (¡°How would I shield those nets in my design ?¡±). Since the Copilot will work within the confines of a particular organization, it will learn to be able to provide contextual responses. For example, say an engineer is seeking a specific capability in Synopsys Fusion Compiler?. In forming the response, Synopsys.ai Copilot would observe what the engineer is working on to provide a more relevant answer. Traditionally, the engineer would research answers on software manuals or SolvNetPlus, seek advice from an experienced co-worker, or even call on an applications engineer¡ªall of which takes much more time and effort.
Over time, as it is enriched and continues to learn more from your unique workflow and methodologies¡ªin a secure, closed-loop manner¡ªthe Synopsys.ai Copilot will be able to provide prescriptive guidance and recommendations and also create workflow scripts. For example, it might help with debug, identify the worst timing path and provide a suggestion to fix it, or offer a script to apply to a particular cell to optimize for power. What¡¯s more, these results could be served up in just minutes.
How would an engineer know whether the answers are accurate? That¡¯s where the human comes into play, providing the checks and balances. After all, the intention of Synopsys.ai Copilot is to help the engineer get the job done faster.
AI Across the Entire EDA Flow
Synopsys.ai Copilot is the latest offering in an AI-driven journey that we began with our launch of Synopsys DSO.ai?, the industry¡¯s first autonomous AI application for chip design. Since then, we¡¯ve expanded our portfolio with Synopsys.ai?, a full-stack AI-driven EDA suite of products. Synopsys.ai, which recently received a World Electronics Achievement Award from EE Times China, uses the power of AI from system architecture to design implementation and manufacturing, taking on tedious tasks such as:
- Design space exploration
- Verification coverage and regression analytics
- Automatic test pattern generation
- Analog design migration
While freeing engineers to focus on chip quality and differentiation, the solution helps to optimize power, performance, and area and also accelerates the design, implementation, and verification of today¡¯s complex designs. Complementing Synopsys.ai is a set of AI-driven data analytics solutions that allows insightful analysis of the vast amount of data collected across design, verification, manufacturing, test, and in-field operations.
In-Depth Technical Demo of Synopsys.ai
Hear from Geetha Rangarajan on how to transform your chip design process to build more chips faster in the face of systemic complexity.
¡°Generative AI capabilities in Synopsys.ai EDA suite?can provide?a real boost to designer productivity,¡± said Navid Shahriari, senior vice president and co-general manager of Intel¡¯s Design Engineering Group. ¡°The ability for the system to automatically generate RTL based on natural language specifications will allow design teams to work efficiently in the face of increasing chip design complexity.¡± ?
It¡¯ll be interesting to observe how GenAI can further transform chip design. There¡¯s great potential for areas such as design content generation. New companies can be empowered to scale more quickly while focusing on their core value, while established companies can enhance their rich knowledge domain for greater productivity.
¡°AMD is very excited about the opportunities we see to provide our design teams with generative AI capabilities that will enable them to more efficiently deliver multiple generations of leadership products,¡± said Mydung Pham, corporate vice president, Silicon Design Engineering at AMD. ¡°We have adopted generative AI capabilities like those in Synopsys.ai EDA suite to provide our design teams with tools that can accelerate high-quality RTL generation and reduce turnaround time for complex design tasks. We are excited to be working with Synopsys on this transformative journey.¡±
AI-driven EDA tools are already able to make decisions. Adding a conversational front-end to these tools provides another powerful way to enhance chip designs and engineering productivity. Down the road, perhaps it won¡¯t be a stretch for GenAI to anticipate the designer¡¯s needs. Maybe it could even help with going from natural language spec to creating entire design workflows. Imagine that.
Synopsys.ai: AI-Driven EDA
Optimize silicon performance, accelerate chip design and improve efficiency throughout the entire EDA flow with our advanced suite of AI-driven solutions.
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Sep 30, 2024
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