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Digging into topics from EDA and autonomous systems to cloud design and AI, this year¡¯s promises to be one to remember. An annual event for the design and design automation of electronic chips to systems community, DAC brings together designers, researchers, tool developers, and vendors for a unique, multi-day experience where participants and attendees can network with, learn from, and speak to industry peers.
This year¡¯s DAC will take place in San Francisco on July 10 through 14, and Synopsys is proud to be sponsoring and hosting a wide range of activities throughout the event. Read on to learn more about Synopsys¡¯ participation in DAC 2022, including its technical tracks, academic-focused initiatives, and other key event highlights to watch for as you plan your schedule for the conference.
Technical Sessions
Interested in learning how to enhance silicon screening using an optimized clustering-based SDD vector? Or how to improve FPGA quality and prototyping turnaround times using static verification? Over the span of four days, Synopsys experts will be sharing these and many more insights and exciting developments on a gamut of different tracks, including:
- The Hardware/Software Nexus in Chip Design
- Creating Robust EDA and IP Ecosystems to Strengthen the Global Semiconductor Supply Chain
- New Directions in Silicon 91³Ô¹ÏÍø
- Static Timing and Power Analysis with Process Space Exploration
- Cryogenic Computing, Super Cool or Not?
Vice President of Enterprise Go-to-Market Sandeep Mehndiratta will speak at the event in a session titled, ¡°It¡¯s Getting Cloudy Out There,¡± from 1 to 1:45 p.m. on July 13 at the DAC Pavilion (Level 2 Exhibit Hall) to discuss the drivers and challenges of moving EDA workloads to the cloud and how leading design teams can maximize the benefits of this transition. For more cloud-related insights, come by our booth (#1320) between 2 and 5 p.m. from July 11 to 13 to chat with our cloud experts (and enjoy some ice cream on us!).
For a complete overview of all Synopsys technical talks, visit our DAC 2022 webpage.
Shaping Tomorrow¡¯s EDA Community
As part of our commitment to empower the future generation of engineering talent at DAC, we¡¯ll be introducing the Synopsys Academic & Research Alliances (SARA) initiative at the event. We will host and sponsor different activities to commemorate this important milestone. On July 10, Synopsys will co-sponsor a Young Fellow Program & Ecosystem Career Panel Lunch to connect and interact with students. The July 12 Ph.D. Forum collocated at DAC will offer Ph.D. students an opportunity to discuss their dissertation research with the EDA community. To learn more about professors¡¯ work and accelerate their teaching, research, and curriculum development, we¡¯ll host a Professor Breakfast and speed networking event on July 13. If you are an academic interested in learning more, please email SARA-Leadership@Synopsys.com.
As firm believers that diversity strengthens our industry, Synopsys is the proud sponsor of the Women in Tech Reception from 6 to 7:30 p.m. on July 11 at the Level 2 Lobby. The reception will serve as a space to talk about diversity in EDA and offers attendees the opportunity to network with like-minded peers. During the reception, Dr. Renu Mehra, vice president of Engineering at Synopsys and 2021 recipient of the Marie R. Pistilli award, will present this year¡¯s Marie R. Pistilli Women in Electronic Design Award, an annual recognition awarded to individuals who have advanced women in electronic design.
Last ¡ª but certainly not least ¡ª is Synopsys¡¯ sponsorship of the 2022 Hack@DAC, a competition focused on penetration testing of hardware and firmware. Participants compete in a unique hacking tournament to identify and exploit security vulnerabilities with a RISC-V SoC open core platform and also propose mitigation techniques. Teams will be using a suite of security tools from the newly announced Synopsys Cloud. Winners will be announced at DAC from 3:30 p.m. to 5 p.m. on July 12.
Synopsys Speaks! and Other DAC Highlights
Looking for more 1:1 time with Synopsys? Good news! Our team of experts will be taking a break from all the buzz of DAC at our Synopsys Lounge (Booth #1320). Grab a cup of coffee, relax, or simply stop by for a quick break and recharge session to power yourself (and your devices!) ahead of the next batch of groundbreaking sessions.
While you enjoy your coffee at booth #1320, why not join us to engage with our Synopsys innovators for our unique Synopsys Speaks! initiative? Learn how Synopsys employees are leading the way in solving industry challenges through passion, innovation, and collaboration.?
The schedule is as follows:?
- Monday, July 11?
- 1 ¨C 1:45 p.m.: Pawini Mahajan, Product Marketing Manager, TestMAX?
- 2 ¨C 2:45 p.m.: Weikai Sun, VP, Engineering?
- 3 ¨C 3:45 p.m.: Renu Mehra, VP, Engineering?
- Tuesday, July 12?
- 1 ¨C 1:45 p.m.: ?Ron Duncan, Senior Manager, Applications Engineering?
- 2 ¨C 2:45 p.m.: Deepashree Sengupta, Staff R&D Engineer?
- 3 ¨C 3:45 p.m.: Radhika Shankar, Group Director, Applications Engineering
- Wednesday, July 13?
- 11 ¨C 11:45 a.m.: Sashi Obilisetty, Group Director, R&D?
If hearing real use cases of Synopsys signoff tools is more up your alley, join us at Synopsys PrimeTime SIG on the evening of July 11 for a great lineup of customers and partners sharing their own experiences with Synopsys solutions. Synopsys will also be co-sponsoring a breakfast panel with Ansys on July 12 with leading customers and industry executives who will share their experiences using 2.5D/3DIC manufacturing technology for standard semiconductor products and bespoke silicon solutions.
See You There?
Don¡¯t miss your chance to hear about the latest EDA innovations firsthand from industry experts. Register today and save your seat for a unique opportunity to learn from and network with leading EDA industry peers. You can access the full agenda and register for our different event highlights on our DAC webpage or visit our new SARA webpage to learn more on how Synopsys is empowering future industry leaders by dedicating efforts to expand university research and education in electronic design.