Cloud native EDA tools & pre-optimized hardware platforms
DesignCon is the premier high-speed communications and system design conference, offering industry-critical engineering education in the heart of electronics innovation ¡ª Silicon Valley.?Attend the event to network with Synopsys¡¯ experts and see several successful interoperability demonstrations of Synopsys¡¯ 224G Ethernet IP, PCIe 7.0, and USB4 in our partner booths. Don¡¯t miss the panels on PCIe 7.0 and electro-optical interconnects with Synopsys and other industry experts.
Terasignal and Synopsys demonstrate the world¡¯s first optical diagnostic interoperability at 112Gbps for next-gen energy efficient interconnects
Anritsu¡¯s Booth #907
Foxconn¡¯s Booth #913
Keysight¡¯s Booth #1039
Samtec¡¯s Booth #1039
Teledyne LeCroy¡¯s Booth #513
Yamaichi¡¯s Booth #758
PCI Express & PAM4: Balancing Silicon & Interconnect Interdependencies for 128 GT/s
Tuesday, January 28 ? 4:45 PM - 6:00 PM Pacific Time (US & Canada)
Join industry leaders from Synopsys, Keysight, BitifEye, Amphenol, Samtec and Intel for an in-depth conversation focusing on the latest updates and changes to PCIe signaling and physical topologies, focusing on the PAM4 signaling in the PCIe 7.0 specification.
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Linear Electro Optical Interfaces: What, Why, When & How?
Wednesday, January 29 ? 3:15 PM - 4:00 PM Pacific Time (US & Canada)
This session will introduce and explain linear electro-optical links, a rapidly growing E/O interface for the next-generation PCIe (6&7) and Ethernet standards (112G/224G) that not only saves overall system power but also reduces data path latency.
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