91³Ô¹ÏÍø

September 5, 2024 | 9:00 a.m. - 6:30 p.m.
Santa Clara Marriott

As electronic systems continue to become more complex and integrate greater functionality, SoC developers are faced with the challenge of developing more powerful, yet more energy-efficient devices. The processors used in these applications must be efficient to deliver high levels of performance within limited power and silicon area budgets.

 

Why Attend?

Join us for the Processor IP Summit to get in-depth information from industry leaders on the latest in ARC-V? RISC-V processor IP, ARC? VPX DSP IP and ARC NPX NPU IP along with related hardware/software technologies that enable you to achieve PPA differentiation in your chip or system design. Synopsys experts, partners, and our processor IP user community will discuss electronic market trends and present on a range of topics including artificial intelligence, automotive safety, software development and more. Sessions will be followed by a networking reception where you can see live demos.

 

Who Should Attend?

Whether you are a developer of chips, systems or software, the Synopsys Processor IP Summit will give you practical information to help you create more differentiated products in the shortest amount of time.

Keynote Spotlight


Alexander Kocher

CEO, Quintauris

9:15 - 10:00 A.M.

 

Enabling RISC-V 91³Ô¹ÏÍø for IoT & Automotive Applications

RISC-V is generating a high interest across multiple industries. In the software-defined era, system integrators are intrigued by the prospects of increased innovation, agility and customization, while cutting cost and reducing supply chain risks.

Those opportunities led to the creation of Quintauris, founded to accelerate the adoption of RISC-V globally by enabling solutions for the Automotive and IoT industries. Quintauris will describe the benefits RISC-V offers to the automotive and IoT market segments, and how the organization will overcome perceived challenges around open standard semiconductor design by nurturing the broad RISC-V ecosystem and facilitating commercial adoption.

Agenda


Thu. September 05, 2024
08:00 - 09:00 AM PDT
Registration and Breakfast
  • California Ballroom
Thu. September 05, 2024
09:00 - 09:15 AM PDT
Welcome and Opening Remarks
  • Yankin Tanurhan, Sr VP, Processor Engineering, Synopsys
Thu. September 05, 2024
09:15 - 10:00 AM PDT
Keynote
  • Alexander Kocher, CEO, Quintauris
Thu. September 05, 2024
10:00 - 10:45 AM PDT
Ensuring Functional Safety and Cybersecurity in SoCs
  • Srini Krishnaswami, Director, Processor Functional Safety & Security Engineering, Synopsys
Thu. September 05, 2024
10:45 - 11:15 AM PDT
Opportunities and Challenges with RISC-V for Automotive Applications
  • Dr. Thomas Roecker, Hardware & Software Architect, Infineon
Thu. September 05, 2024
11:15 - 12:00 PM PDT
Efficient Processing for DSP Workloads
  • Pieter van der Wolf, Sr Architect, Processor Software Engineering, Synopsys
Thu. September 05, 2024
12:00 - 01:00 PM PDT
Lunch
  • California Ballroom
Thu. September 05, 2024
01:00 - 01:45 PM PDT
91³Ô¹ÏÍø to Accelerate and Optimize Software for Scalable and Extensible Processor IP
  • Francois Bedard, Sr Director, Software Engineering, Synopsys
Thu. September 05, 2024
01:45 - 02:15 PM PDT
Executing High-Performance AI Processing for Automotive and Edge Applications
  • Ron DiGiuseppe, Automotive Segment Manager, Synopsys
Thu. September 05, 2024
02:15 - 03:00 PM PDT
Leveraging Virtualization for Efficient Resource Allocation in High-Performance Processor IP Subsystems
  • Alexey Smirnov, Software Engineering, Principal Engineer, Synopsys
Thu. September 05, 2024
03:00 - 03:15 PM PDT
Thu. September 05, 2024
03:15 - 03:45 PM PDT
Approaches for Software Migration to RISC-V
  • Greg Eddington, Engineering Manager, Green Hills Software
Thu. September 05, 2024
03:45 - 04:30 PM PDT
Key Requirements for Successfully Implementing Generative AI in Edge Devices
  • Fergus Casey, Executive Director, Processor Engineering, Synopsys
Thu. September 05, 2024
04:30 - 04:45 PM PDT
Closing Remarks
  • Matt Gutierrez, Executive Director, Processor Product Management, Synopsys
Thu. September 05, 2024
05:00 - 06:30 PM PDT
Networking Reception, Demos, and Raffle Drawing
  • Sedona Room

Raffle Drawing

Drawing at 5:45 PM and 6:15 PM

Complete the event survey on September 5th to be entered in the drawing for a chance to win a DJI Mini 2 SE.

*Must be present to win.