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Why Attend?

Learn from OIP partners how to leverage their technology for your design challenges: 
  • Emerging advanced node design challenges and corresponding design flows and methodologies for A16, N2/N2P, N3/N3E/N3P/N3AE, N4/N4P, N5/N5A, N6/N6e/N6RF/N7, N12e, and N22
  • Latest updates on TSMC 3DFabric? chip stacking and advanced packaging processes, InFO, CoWoS?, and SoIC, 3DFabric Alliance, and 3Dblox? standard, plus innovative 3Dblox-based design enablement technologies and solutions, targeting HPC, AI/ML, and mobile applications
  • Comprehensive design solutions for specialty technologies enabling ultra-low power, ultra-low voltage, analog migration, RF, mmWave, and automotive designs targeting 5G, automotive, and IoT designs
  • Ecosystem specific TSMC reference flow implementations, P&R optimization, machine learn-ing to improve design quality and productivity, and cloud-based design solutions
  • Successful , real-life applications of design technologies and IP solutions from TSMC's Open Innovation Platform? Ecosystem members and TSMC customers to speed up time-to-design and time-to-market

Synopsys In-Person & Virtual Presentations | North America

In-Person Presentations: 

  • A Unified AI-Driven Platform for Multi-Die Exploration and Design
  • Ansys-Synopsys-TSMC Solve the 3DIC Multiphysics Challenges
  • Developing Next-Gen Battery Charging Technoloy Partnering with TSMC and Synopsys for a Sustainable Energy Future
  • Effective methods to resue and automate bump creation for chiplets in 3DI designs
  • Multi-die design for TSMC COUPE with unified electronic and photonic design solutions

 

Virtual Presentations:

  • AI-based RF design synthesis flow
  • AI-Driven Analog Migrations 91³Ô¹ÏÍø Tuned for TSMC Technology Platforms
  • Fast Vt skew analysis for highly accurate global variation modeling
  • Leveraging TSMC's CoWoS Interposer and Synopsys' SLM IP to Monitor, Test, and Repair Multi-Die Designs
  • Revlitionizing RC Parasitic Extraction: The Power of StarRC Hybrid Extraction and GPU Accleration
  • Emabling SoC Sclaing to GAA Processes with Synopsys Foundation IP
  • Insights into the Synopsys-TSMC UCIe IP on CoWos Test Chip

 

TSMC OIP Worldwide Events

Synopsys In-Person Booth

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Synopsys Booth #204

TSMC attendees are invited to visit the Synopsys booth to view the latest innovative technologies and chat with Synopsys experts live! 

Booth topics include:

  • Synopsys IP
  • AI-Driven EDA Tools
  • Digital and Analog & Mixed-Signal Design
  • Golden Signoff
  • Physical Verification Closure,
  • Silicon Lifecycle Management
  • Automotive 91³Ô¹ÏÍø