Cloud native EDA tools & pre-optimized hardware platforms
VC SpyGlass? CDC provides a comprehensive methodology with scalable capacity for quality signoff with high debug productivity.
VC SpyGlass CDC correlates control and data signals resulting in a good understanding of the design intent for the lowest possible noise. It has also integrated structural and functional CDC analysis and enables single-step inbuilt formal based functional CDC analysis. Users also have the flexibility to generate Static Database to verify CDC protocols and assumptions made for structural analysis.
Comprehensive structural and functional CDC analysis using formal and simulation based solutions
Highest performance and capacity to achieve faster signoff leveraging inbuilt formal
Easier and faster handling of millions of violations
Synopsys Design Compiler?, SpyGlass? and PrimeTime? use models
Clock, reset and clock domains information from constraints
Synchronizers and auto-detection of quasi-static signals for lower false violations
Support for UPF and SDC based CDC analysis and Verdi? integration for CDC centric debug
Hierarchical flows for fast turnaround using signoff abstract model
With increasing complexity and large design sizes, achieving predictable design closure is a challenge, and clock domain crossings (CDC) ranks near the top in difficulty. Today¡¯s SoCs have dozens, or sometimes even hundreds, of asynchronous clock domains, making it very difficult to verify using conventional simulation or static timing analysis. CDC issues have become a leading cause of design errors. Such errors can add significant time and expense to the design-and-debug cycle and may even find their way into silicon, necessitating costly re-spins.
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