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Driving the Next Wave of Product and Market Innovation

Synopsys has a long history of successful collaboration with  to provide advanced EDA and IP solutions that enable our mutual customers to accelerate product and system innovations in a broad range of applications such as mobile, automotive, high-performance computing and IoT.  Synopsys¡¯ comprehensive RTL-to-GSDII solution offers superior power and performance for designs on GF¡¯s 22nm FD-SOI (22FDX?) process. Synopsys¡¯ high-quality DesignWare? Interface and Foundation IP is available on a wide range of GF processes including 22-, 14- and 12-nm. Building on co-developed reference flows, silicon-proven design implementation tools, and IP, Synopsys and GF enable customers to achieve the highest quality-of-results and accelerate their path to volume production.

Key Benefits

Proven Reference Flows & IP

Accelerate development of high-performance automotive, edge AI and 5G SoCs

Design in the Cloud

Address growing computational demands for design and verification

Decades of Collaboration

Quickly develop innovative solutions with platform readiness

Areas of Collaboration

<p>GF Fotonix? is a monolithic platform that combines 300mm photonics and 300 GHz-class RF-CMOS features on a silicon wafer. It is ideal for applications such as HPC, datacom, LiDAR, IoT, and optical computing. The Synopsys <a href="/content/synopsys/en-us/photonic-solutions.html">unified electro-optical co-design solution</a> supports the process design kit (PDK) offered by GF with an end-to-end seamless design flow that includes schematic capture and layout synthesis with OptoCompiler?, simulation with Synopsys PrimeSim? and Synopsys OptSim?, and design rule checking (DRC) and layout versus schematic (LVS) with Synopsys IC Validator?. The flow also supports PDK-driven design and custom design with Synopsys¡¯ Photonic Device Compiler.</p>

Collaboration on GF Fotonix Technology

GF Fotonix? is a monolithic platform that combines 300mm photonics and 300 GHz-class RF-CMOS features on a silicon wafer. It is ideal for applications such as HPC, datacom, LiDAR, IoT, and optical computing. The Synopsys unified electro-optical co-design solution supports the process design kit (PDK) offered by GF with an end-to-end seamless design flow that includes schematic capture and layout synthesis with OptoCompiler?, simulation with Synopsys PrimeSim? and Synopsys OptSim?, and design rule checking (DRC) and layout versus schematic (LVS) with Synopsys IC Validator?. The flow also supports PDK-driven design and custom design with Synopsys¡¯ Photonic Device Compiler.

Collaboration on GF 22FDX Technology

The GF 22FDX?-based solutions are ideal for low power IoT products. The Adaptive body bias (ABB) feature helps reduce power leakage at the device level. Synopsys and GlobalFoundries have collaborated on ABB and presented a hands-on demo of the design tools and IP in action.

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<p>Integrated technology-proven process design kits (PDKs) and silicon-proven standard cell libraries are included in the jointly-developed reference flows. These ¡°starter kits¡± provides customers with a built-in test case for out-of-the-box physical implementation, testing and analysis of performance, power and area considerations. Most recently, Synopsys has qualified its GF 22FDX reference flow on AWS.?Designing in the cloud offers speed and efficiency advantages by overcoming compute capacity bottlenecks and utilizing dynamic scaling at all stages of design. The qualified flow is a result of a multi-year collaboration on co-optimized tools and methodologies that maximize the power, performance and area benefits of the GF 22FDX process.?Synopsys¡¯ automotive reference flow for ASIL-D designs on GF's 22FDX process leverages DesignWare ARC? Processor IP to provide designers with a comprehensive solution that accelerates time-to-market for SoC-level ISO 26262 qualification.?</p>

Reference Flows and Methodologies

Synopsys provides integrated technology-proven PDKs and silicon-proven standard cell libraries in jointly-developed reference flows, offering built-in test cases for physical implementation, testing, and performance analysis. Recently, Synopsys qualified its GF 22FDX reference flow on AWS, leveraging cloud advantages like speed, efficiency, and dynamic scaling. This qualified flow results from years of collaboration on tools and methodologies to maximize GF 22FDX's power, performance, and area benefits. Synopsys' automotive ASIL-D reference flow on GF 22FDX uses DesignWare ARC? Processor IP, accelerating time-to-market for SoC-level ISO 26262 qualification.

<p>Synopsys provides a broad portfolio of silicon-proven DesignWare? Interface and Foundation IP solutions for GF process technologies ranging from 180-nm to 12LP and 12LP+. The IP portfolio consists of a broad range of widely used interface IP, logic libraries, embedded memories, and non-volatile memory (NVM), optimized to deliver the best performance, power, and area on GF processes. Our collaboration with GF enables us to deliver an IP portfolio for automotive Grade 1 and Grade 2 temperature operation on GF¡¯s 22FDX process, helping to accelerate SoC-level qualification. By providing the industry¡¯s broadest IP portfolio for GF processes, Synopsys enables designers to quickly integrate high-quality IP and speed their time to volume production.?</p>

DesignWare IP for GF Processes

Synopsys provides a broad portfolio of silicon-proven DesignWare? Interface and Foundation IP solutions for GF process technologies ranging from 180-nm to 12LP and 12LP+. The IP portfolio consists of a broad range of widely used interface IP, logic libraries, embedded memories, and non-volatile memory (NVM), optimized to deliver the best performance, power, and area on GF processes. Our collaboration with GF enables us to deliver an IP portfolio for automotive Grade 1 and Grade 2 temperature operation on GF¡¯s 22FDX process, helping to accelerate SoC-level qualification. By providing the industry¡¯s broadest IP portfolio for GF processes, Synopsys enables designers to quickly integrate high-quality IP and speed their time to volume production.?

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