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So why would anyone consider these TSV devices? Well, there¡¯s a few good reasons:

• Building the highest capacity servers starts with the highest capacity DIMMs. If your DIMM sockets are already ¡®maxed out¡¯ with non-stacked x4 DIMMs carrying 8Gb dies, then ¡®the only way is up¡¯.
• Providing more capacity in less unit volume compared to adding more packages or more DIMMs. This can be critical for devices like enterprise-class SSDs where PCB area and volume is at a premium.
• Potentially improved performance compared to multirank solutions. The structure of 3DS devices means that there is the potential for intra-stack operations to happen with less delay than inter-rank operations. This can improve performance in some applications (in-memory computing, for example).
• Adding capacity without adding bus loading. You may not have ¡®maxed out¡¯ the bus, but you may want to add capacity without adding additional bus load. Reducing load on the bus will tend to decrease the power substantially and increase the maximum achievable frequency in that system. A key feature of the 3DS packages is that they present a single load to the bus regardless of how many dies are in the stack.

It¡¯s that last point that confuses a lot of people. How can you have a stack of 4 dies that only presents one load to the bus? The picture above helps to explain. Inside the DDR4 3DS package, there is typically only one physical interface (Clock, Command, Address, Data, Data strobes, etc) on a master die that is connected to the outside of the package, and all the DRAM traffic to the master die and all of the slave dies inside the package go through that one physical interface on the master die. Inter-die communication within the stack from the master to the slaves is carried on the through silicon vias (TSVs) through the stack.

So there you have it: DDR4 3DS Devices ¨C increased DRAM capacity without increasing PCB area or bus loading, at a price.