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The AI era is fostering unprecedented innovation across industries and creating acute challenges for the high-performance computing (HPC) industry to support exponential power and performance demands. AI alone is poised to increase data center power demand by 160 percent by 2030, as queries from applications like ChatGPT . The HPC ecosystem is exploring new semiconductor designs to unlock next-generation infrastructures that deliver greater performance and energy efficiency. One promising area of semiconductor research looks to answer the question, ¡°Can sub arctic-cold, microscopic circuits = a more energy efficient AI data center?¡± Enter ¨C cryogenic CMOS.

Synopsys and Semiwise Deliver High-Accuracy Cryogenic CMOS Modeling and Simulation Platform

Synopsys and Semiwise, a company specializing in complementary metal-oxide-semiconductors (CMOS), are collaborating on a bold response to this challenge. Together, the companies have demonstrated a modeling and circuit simulation platform to operate CMOS at sub 0.5 volts and temperatures of -120¡ãC or lower, defined as cryogenic. The platform, which has been verified through TCAD and data-calibrated models, can reduce total power consumption by a factor of four or more while preserving circuit performance. Samples of the research results will be presented at the Applied Superconductivity Conference and .

This research milestone advances the commercial viability of cryogenic CMOS models for HPC applications by enabling design engineers to conduct accurate simulations for their cryogenic circuits and ensure performance reliability in extremely low temperatures, which is critical for data centers. Synopsys is using a process design kit (PDK) provided by Semiwise, based on Synopsys technology computer-aided design (TCAD) modeling capabilities, to run simulations of circuit performance of real designs on the GlobalFoundries (GF) 22FDX fully-depleted silicon-on-insulator (FD-SOI) technology at ultra-low temperatures. The GF FD-SOI technology is a type of CMOS that allows device threshold voltage to be electrically altered to optimize device performance. While FD-SOI technology is not new, its application at extremely low temperatures below 4¡ãK with high accuracy is novel. 

¡°The collaboration between Synopsys and Semiwise on the modeling and simulation platforms is significant for the HPC industry because HPC chips can now be reliably modeled to design, test, and evaluate for low-temperature operations, promoting energy-efficient circuits suited for advanced data centers,¡± said Jamil Kawa, Synopsys Fellow and R&D lead for the company¡¯s superconducting and cryogenic CMOS research. ¡°In addition, moving to the 4¡ãK zone with these models also supports a viable platform for simulating critical circuits for applications such as quantum controllers and quantum interface circuits.¡± 

¡°The implications of reaching this research milestone with Synopsys are significant for addressing power consumption in HPC, AI, neuromorphic computing, and other high-performance applications,¡± said Asen Asenov, CEO, Semiwise. ¡°Our modeling and simulation platform shifts the discussion from a theoretical science experiment to real use cases.¡±

A Catalyst for Additional Cryogenic Computing Innovation

The Synopsys and Semiwise collaboration is sparking new concepts that Synopsys is actively researching further. For example, the Synopsys R&D team is modeling transistor operation at close to absolute zero temperatures, which could be used in the development of cryogenic FD-SOI IP to support control functionality. 

Another prospect is the combination of cryogenic FD-SOI and superconducting electronics operating at the same temperature and integrated within a common module in the same chamber. Superconductors can provide even lower power computation than semiconductors but have limitations in density based on device and interconnect characteristics. 

Synopsys Fellow Jamil Kawa will present findings from the Synopsys superconducting research project, including the Synopsys-Semiwise cryogenic FD-SOI modeling and circuit simulation platform, at the Applied Superconductivity Conference (ASC), September 1-6, 2024, in Salt Lake City, and at the , September 9-11, 2024, in Fukuoka, Japan.