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A world without Wi-Fi? That¡¯s just one of the many innovations that we would have to forgo if devices operated without industry standards. From the smartphone in your hand to the myriad of smart home devices across the room and the internet router in the hallway ¡ª all these devices function the way they do because of their native compatibility to universal interface standards that enables seamless inter-device communication.

Standards are the backbone of interoperable solutions required for design and manufacturing of the most complex semiconductor devices. Today, consumers worldwide benefit from standards such as Ethernet, Bluetooth, and Wi-Fi, and the work of engineers that create these vital standards.

With the number of connected devices expected to reach 38.6 billion by 2025, there has never been as large an influx of data as we have today. According to IDC, and is expected to grow to more than 180 zettabytes in 2025. Of course, the pandemic only influenced the increase in the number of people working, learning, and streaming hours of content from home ¡ª a seismic shift that will leave a lasting impact for years.

Irrespective of the application, be it high-performance computing (HPC), advanced storage and machine learning algorithms trained for image recognition, or autonomous cars feeding in real-time traffic data to control the car, system-on-chip (SoC), designers need to incorporate the latest high-speed interface standards with minimal latency to meet the exploding bandwidth demands of these systems.

Read on to learn more about what makes standards important to the EDA industry, the advantages of being involved in standards development early on, what it means for customers, and how Synopsys is supporting a new world of innovation.

Benefits of Participating in Standards Development

Standards bring customers and competitors together in search of common ground. Being actively engaged in the standard definition process allows teams to get an early start on design planning, have access to implementation considerations, and accurately align internal developments with predicted timelines (or even ahead of schedule!).

Every industry group that governs the standards development process follows an independent and neutral approach in close collaboration with the industry. Aspects of the final standards are decided by consensus. If you look at the Ethernet standard that is maintained by the IEEE, sometimes it seems like it takes a very long time to standardize, however, if you go into your old electronics bin, dig out an old Ethernet device, and connect it to your network, it will still work! Ethernet has been around for some time and continues to evolve to meet evolving market requirements. To ensure standards are easily adopted, companies like Synopsys play an important role in providing active feedback during development.

As SoCs become more complex to address the demands of more applications creating more data, the standards on which IP blocks are based have and will continue to evolve ¡ª making it important for companies to diligently follow the latest developments and support customers with a clear risk assessment. Typically, it takes about two to five years for the entire definition process to be completed on the standard involved. While that may seem like a long time, organizations that don¡¯t get involved within the first or second year of standardization will ¡°miss the bus,¡± which means those who are first to market get the highest return on the investment.

In the case of Ethernet, over the years, we¡¯ve seen early industry adopters who have access to both sides of the IP link be more willing to take risks in the early silicon stage, even while the standards are yet to be ratified.

This move allows for significantly more data to be pushed through data centers, decreasing latency and making the entire internet faster as adoption increases. Compared to the 400 GbE specification, 800 GbE addresses twice the bandwidth. Architecturally, the specification proposes a new media access control (MAC) and physical coding sublayer (PCS) while repurposing two sets of the existing 400 GbE logic to distribute the data across eight 106 Gbps physical lanes. As the PCS is reused, the forward error correction is retained for simple compatibility with existing physical layer specifications. With double the lanes, data centers will not need to totally change their port configuration to handle 800 GbE, making the transition easier.

While 800 GbE initially started off for high-density switches in large data centers, the number of applications it can support has grown. However, high data rates present their own set of challenges to establish end-to-end interoperability ¡ª from handling very fast clocks to using different components from different vendors ¡ª particularly since 800 G Ethernet has not yet been standardized.

To adapt port speeds from 10 Gb Ethernet to 400G/800G Ethernet and extend port densities from dozens to hundreds of ports, the latest generation Ethernet switch SoCs need to scale to provide the lowest latency. With the need for higher bandwidth networking equipment and connections in cloud expansion and hyperscale data centers, we expect that 800G optical modules and transmissions will become the norm.

Pushing the Envelope on Better Software

As an industry leader and pioneer of the EDA industry, standards are part of our DNA at Synopsys. We aren¡¯t just involved with shaping the standards and providing quality IP, but also actively educating customers on different complexities that need to be addressed to implement the latest standards on chips.

To achieve the lowest latency with maximum throughput for all transfer sizes, we work closely with several industry bodies to propel technology advancements forward and enable our customers to meet their performance and data connectivity requirements. Synopsys has been a long-time member of IEEE and is active in many industry standards groups, including PCI-SIG, IEEE, The Ethernet Consortium, Accellera, to list a few.

Our significant investment in developing silicon-proven and standards-compliant IP on the most advanced process technologies has provided designers with a low-risk path to achieving their design requirements. Tools like the Synopsys RTL Architect? enable RTL designers to ¡°shift-left¡± and predict the implementation impact of their RTL changes faster than ever before.

Synopsys IP solutions have gone through extensive third-party interoperability testing and certification, enabling SoC designers to accelerate time-to-market and reduce integration risk for next-generation SoCs. In May 2021, we , a provider of Ethernet Digital Controller IP supporting data rates up to 800G. The acquisition expanded our silicon-proven high-speed Ethernet IP portfolio with an integrated 200G, 400G and 800G MAC, PCS and PHY offering, allowing designers to meet their interoperability expectations and have access to a team of experienced R&D engineers who have led the development of the high-speed Ethernet specification. In fact, Synopsys MorethanIP team worked closely to define the Ethernet Technology Consortium¡¯s latest 800 GbE standard.

In addition, the IEEE-compliant Synopsys DesignWare? Ethernet IP 91³Ô¹ÏÍø ensure interoperability between digital and mixed-signal layers and are extremely low in power, area, and latency for applications such as automotive, consumer, high-performance computing, and networking. To strengthen our HPC IP portfolio even further, we announced the , PHY, and verification IP solutions for PCIe 6.0 technology, supporting the latest features including 64 GT/s PAM-4 signaling, FLIT mode, and L0p power state.

Going forward, our vision is to advance the entire electronic design industry with access to the world¡¯s most advanced technologies for chip design, verification, IP integration, and software security and quality testing.