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SLM Built-in Self-Test IP
Enables structural testing of logic during in-system operation
Synopsys SLM BIST IP delivers a solution for in-system self-test of digital designs where functional safety is critical, such as automotive, medical, and aerospace applications. BIST family consists of LBIST and XLBIST variants. LBIST is targeted for Analog Mixed-Signal designs where digital content is not heavy, making compact BIST design necessary. XLBIST has X-tolerant capability with compression making it suitable for large digital designs. Both products come with ASIL D ready FuSa certification. TestMAX ATPG is used to generate seed & signature needed by BIST IP.
Logic Built-in Self-Test (LBIST)
Key Features
- Enables traditional logic BIST
- Down-sizable PRPG and MISR
- X-states must be identified and blocked,
- X propagation analysis available
- Parallel interface for seed & sign (no TDR), Optional 1687 Access
- MISR signature analyzer for Pass/Fail
- TestMAX ATPG generates seed & signature
Key Benefits
- Small area for Big A/Small d designs
- Highly configurable
- Manufacturing test
- Power-on system test
- In-system test
- In-field self-test
X-Tolerant Logic Built-in Self-Test (XLBIST)
Key Features
- Enables both non X-tolerant and X-tolerant logic BIST
- Removes the need to eliminate all X-states
- Addresses post-silicon non-deterministic timing issues
- Power-aware pattern generation supported
- Native 1500/1687 access
- MISR signature analyzer supported in diagnosis for manufacturing mode
- Supports SEQ compression
- TestMAX ATPG generates seed & signature
Key Benefits
- X-tolerant logic BIST with compression
- Manufacturing test
- Power-on system test
- In-system test
- In-field self-test
PODCASTS