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Like taxes, chip verification is an unavoidable reality. Chip designers constantly rank it as one of their most critical, challenging and time-consuming tasks. As design complexity and size continue to escalate, design teams need more powerful and efficient ways to optimize their verification strategies.
There is a myriad of verification options to address the nuances of complex integrated circuit and system design, whether it¡¯s dealing with intricacies of 5 nanometer circuit design, or the equally complex job of developing optimized embedded software ¨C or even combining the two worlds to perform true system-level validation. Regardless, the old adage of you can never verify too much (or too early) still holds true.
Done correctly, verification is the key to meeting demanding chip design schedules and ensuring a better quality result; done wrong, it can be a project killer.
Verification is embedded throughout the SoC development process with methodologies used to attack specific pain points, and ultimately converge on a fully functional system and working silicon. This requires not only high performance and productivity-oriented tools, but a continuum of sorts that allows rapid iterations, collaboration across disparate teams and a compression of the time required to reach the system verification objective.
Synopsys offers a broad spectrum of verification tools that support each step of the process, from virtual prototyping, to formal verification and timing analysis, to HDL simulation through to high-powered emulation and physical prototyping systems. On top of that we deliver intuitive debug and analysis capabilities to quickly find and correct errors, as well as suite of accurate and time saving models of critical functions to further expedite the verification cycle
Prototyping Is a Critical Linchpin in the Verification Continuum
FPGA-based prototyping, as well as the increasingly popular virtual prototyping (and hybrids of both), have emerged as favored methods in the chip design arsenal. Modern prototyping systems allow design teams to perform verification at all levels of abstraction and detail, across all stages of the chip design process, and within the specific disciplines of hardware and software development.
All of which introduce a challenge in and of itself: When it comes to prototyping solutions, one size does not fit all.
Synopsys recognizes that fact and offers the most complete portfolio of prototyping tools available. Our strategy is based on a production-proven platform, including robust solutions and models for early virtual prototyping and a scalable hardware FPGA prototyping offering, both of which have been in production use for more than 15 years.
We look across the entire continuum of chip verification challenges and offer prototyping solutions for each stage and type of requirement. While a big part of that is focused on high performance throughput, it¡¯s not all about raw horsepower. Scalability, reliability, access to reliable models and the ability to iterate quickly and seamlessly are all part of the equation in compressing total verification and pre-silicon software bring-up time. Automated partitioning of large designs across multiple FPGAs is an increasingly necessary feature as well. Also of critical importance is reaching timing closure for the prototype, without automation often an error fraught and iterative process. Prototyping automation is instrumental in delivering optimal prototype efficiency and more predictable schedules.
Software Takes on Critical Importance
Despite our roots as a provider of hardware design tools, we recognize that the software side of software-on-chip (SoC) and system design is driving the industry forward today. Even the most traditional IC companies employ more software developers than hardware designers, and software development extends well into the ecosystem of the electronics development world, including into systems companies. In fact, with our virtual prototyping tools and platforms, in-process designs can easily be deployed through the supply chain, enhancing communication and enabling suppliers and customers to exercise concurrent development.
In the past, hardware and software were developed in isolation and converged at the late integration and testing stages. Time-to-market pressure, combined with the increasing amount and value of optimized software, has led companies to adopt parallel development, enabled by early and iterative prototyping. The Synopsys virtual prototyping tools and development environment enable software engineers to start development months before the hardware design is complete, enabling full system bring-up to occur within days of silicon availability.
Already known for its performance benefits for SoC software development as a design nears completion, virtual prototyping has emerged as a critical aid in system level design. For software developers, there is not a need for cycle accurate verification and developers are more focused on verifying performance and quality at higher levels of abstraction, often independent of the hardware ultimately being targeted. It¡¯s actually more important to only focus on the minimal functionality that is needed to execute the target software, which typically doesn¡¯t require hardware implementation details. Prototyping¡¯s system design benefits are especially advantageous with designs that contain significant new blocks and or changed subsystems that require new or updated software.
With Synopsys virtual prototyping solutions, designers can model a physical system and use this representation for multiple tasks, including architecture design, software development, and system testing. Using fast, fully functional software models of complete systems that execute unmodified production code and provide unparalleled debug efficiency facilitates true concurrent design.
An Integrated Verification Continuum
While there are multiple ways of applying prototyping methods to system design, the key lies in it being integrated in an end-to-end solution that provides a seamless continuity across the entire process. This also includes connection to other verification methods such as simulation, emulation and unified debug to find and fix bugs across all domains and abstraction levels, as well as access to models and design kits. A well-equipped verification strategy, anchored by modern prototyping approaches, can go a long way toward ensuring success in competitive markets.