Cloud native EDA tools & pre-optimized hardware platforms
Synopsys¡¯ HAPS prototyping systems are used when synthesizable RTL source code of the ASIC/system-on-chip design is available, allowing designers to develop software, verify SoC hardware and enable system validation before the silicon is taped-out. Hardware and software design teams can deploy HAPS? systems in a variety of roles in the SoC development cycle.
A fast, pre-silicon representation of an IP, subsystem or entire SoC enables SW teams to develop drivers and firmware, integrated with existing operating systems. Commonly used debuggers such as Trace32 or DS5 are connected via a JTAG interface. A variation of this use case is enabled through Hybrid Prototyping in which the processor is running outside HAPS as a model while the rest of the system is mapped into HAPS saving prototyping capacity. Synopsys Virtualizer offers the broadest set of models for this unique use case.
System validation is a unique capability for HAPS users. Through the support of a wide variety of accessory card and speed adapters, HAPS systems interact with the real-world either at full protocol speed or through slower rate adaption. This enables to execution of realistic scenarios including effect such as ¡®hot plugs¡¯.
With the optimization of SoCs for power design teams employ sophisticated low power design strategies specified in UPF (unified power format). HAPS prototyping software is able to map UPF into specific implementations that allow to mimic effects such as isolation and retention such that running a design through an extensive software stack can show if all of the system remains functional going through the different power states.
If you a commercial IP provider or an internal IP development team, HAPS is ideal for your purpose. HAPS is used as an IP validation platform by the two largest IP providers, Arm and Synopsys, as well as by many IP teams in leading semiconductor companies. Weather you package up your IP into a kit that can be used internally or ship externally such as a IP Prototyping Kit, HAPS is an ideal platform to ensure your IP is quickly integrated and used in the way you intended it to be used.
With its pervasive user base in the semiconductor industry and its proven, robust architecture HAPS is ideal as a mechanism to share IP with partners for the purposes of demonstration, evaluation or joint software development. Enabled through Synopsys¡¯ worldwide presence, provisioning and support of this important business enabler is a key benefit for IP, semiconductor and system companies. An example of this is Synopsys¡¯ own IP Accelerated program, which it provides IP Prototyping Kits based on HAPS to its IP licensees.
In summary, Synopsys' HAPS prototyping systems offer a range of benefits for ASIC/SoC design, providing pre-silicon representation for software development, system validation, power validation, IP development, and supply chain enablement. Its versatility allows for the development of drivers and firmware, integration with common debuggers, and the execution of realistic scenarios. It supports UPF for power validation and serves as an ideal platform for IP validation. Moreover, its robust architecture and widespread use in the semiconductor industry make it an excellent tool for sharing IP with partners, as demonstrated by Synopsys' own IP Accelerated program.
Verify the entire SoC with industry-leading VCS? simulation, Verdi? debug, VC SpyGlass? RTL static signoff, VC Formal? Apps, and silicon-proven Verification.