Cloud native EDA tools & pre-optimized hardware platforms
The Synopsys University Program announces the 2017 student design contest in India featuring Synopsys Custom Design tools. This contest gives students the opportunity to showcase their talent in electronic design. Project designs will be judged by a committee of Synopsys technical staff based on the functionality and efficiency of the design, and on the team¡¯s productivity. Teams selected to compete in the contest will receive a free 3-day training workshop hosted by Synopsys and the chance to win a cash prize.
Prizes:
Contest Rules:
Eligibility:
Required Skills & Tool Knowledge:
- Analog integrated circuit features, design and analysis methods of basic analog circuits
- Principles of analog circuit techniques, variants, improvement methods of parameters, research of structures, analysis of different basic analog IC parameters
- Differential and operational amplifiers, switched capacitor circuits, oscillators, phase looked loops, data converters, secondary power sources, etc.
- Custom WaveView?, Custom Compiler?, HSPICE?, IC Validator, StarRC?
- Linux/Unix OS, including the usual commands needed for running EDA tools
How to Nominate a Team:
Teams can only be nominated by a university/college/institute professor or department head that will sponsor and support the team during the contest.
Evaluation Criteria:
Project submissions will be evaluated by the contest committee members and judged based on the following criteria:
The decision to accept any contest entry and all judging decisions will be made by the contest committee in its sole discretion and will be final. In the event Synopsys determines that one or more prize winners are ineligible according to the contest rules, Synopsys reserves the option to award no prize, or to award a prize to an alternate contest participant.
Timeline:
Call for Team Nominations Opens | July 2017 |
Deadline for Team Nominations | August 2017 |
Selected Teams Notified | August 2017 |
Tools/Methodology Training Workshop* & Contest Problem Statement Distributed | August 2017 |
Schematics & Reports Due | October 2017 |
Finalists Notified | October 2017 |
Final Schematics, Layouts, and Reports Due | November 2017 |
Winners Announced | December 2017 |
*All teams are required to attend one 3-day training workshop. Training workshop details will be distributed to teams at a later date. No funding will be provided by Synopsys for travel or stay during training.
Additional Terms and Conditions:
For additional contest information, please contact us.