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Arm has recently introduced the . This is a chip(let)-to-chip(let) extension of the AMBA CHI architecture and is referred as AMBA CHI C2C protocol. This article delves into the details of the AMBA CHI Chip-to-Chip protocol and the associated Synopsys' verification solutions tailored to meet industry demands.
.AMBA CHI C2C protocol also scales to the upcoming major revisions of AMBA CHI standard, beyond CHI Issue F (CHI-F). Please refer to our blog on Synopsys AMBA CHI-F VIP for more details on Industry leading AMBA CHI verification IP solutions.
The CHI C2C protocol enables building a system with multiple CPU, accelerator, or other device chips or chiplets using CHI protocol. In this blog, the terms "chip" and "chiplet" are used interchangeably unless explicitly stated otherwise.
The two primary use cases covered by the CHI C2C protocol are:
The conceptual diagram below illustrates the connection between two chiplets via UCIe. Each chiplet demonstrates a logical flow from on-chip CHI to the corresponding CHI C2C layers, functioning as the UCIe streaming protocol layer. C2C interface such as AMBA CXS, establishes a connection between the streaming protocol layer and the UCIe transport.
The functional logic between the on-chip CHI interface and the chip pins that the message traverses through is composed with multiple functional layers. Any of these below layers can be a Synopsys Verification IP component, depending on the target DUT and the required verification topologies. For eg: on ¡®chiplet 0¡¯, the UCIe Streaming Protocol Layer, C2C I/F TxRx, UCIe transport can be Verification IPs from Synopsys. Whereas on-chip CHI logic on ¡®chiplet 0¡¯, and entire ¡®chiplet 1¡¯ can be DUT components.
In the presence of transport layers, the C2C packetization layer accommodates two container formats for packing and unpacking C2C messages, depending on the specific Transport layer:
In the diagram below, the two chiplets are interconnected through UCIe, within a SiP (System in Package). This diagram illustrates the initialization flow of the C2C protocol, with AMBA CXS as the C2C interface.
The C2C interface initialization is required to enable sending and receiving C2C protocol messages. This includes:
The local and remote C2C protocol layers incorporate a credit exchange mechanism to control the flow of C2C messages. This mechanism is essential for a local transmitter, managing the associated remote receiver buffer size, similar to the on-chip CHI per-channel credit mechanism.
The C2C protocol also introduces the concept of 'Resource Planes' to further categorize messages within a message class. Each resource plan (RP) is assigned an independent message class credit pool, allowing messages from one RP to make forward progress while those from another RP may not advance. This approach aids in meeting system requirements for Quality of Service (QoS), resembling the TC-VC mapping found in the PCIe protocol.
Following the completion of interface initialization, it is essential to exchange interface properties bidirectionally for each logical link prior to sending any protocol messages. These properties encompass:
Arm and Synopsys have continued to collaborate close on this newest extension of the AMBA protocol family to ensure joint customers can experience the benefits from using the AMBA CHI C2C protocol, while ensuring their chiplets and multi-die designs are adherent to the protocol standard.
Several HPC and datacentre customers already achieved tape out success using Synopsys AMBA Verification IPs along with multi-chip verification solutions catering to CHI Host based SMP topologies, as well as CHI host to CXL Cache/Mem device topologies.
Please contact Synopsys for more details on Verification solutions for AMBA CHI C2C, AMBA AXI C2C, AMBA CHI, AMBA AXI, UCIe and CXL protocols catering to the simulation and emulation needs for pre-silicon verification/validation of chiplet and multi-chip design topologies.