Cloud native EDA tools & pre-optimized hardware platforms
Date: Apr 30, 2025 | 10:00 AM PST
Join us for an Q&A technical session with Madhumita Sanyal, technical product director of HPC IP, and Richard Solomon, principal product manager and vice-president of PCI-SIG, discussing the pivotal role of PCIe 7.0 in enabling high-performance computing, AI clusters, and next-gen chip designs. This session will explore the need of transitioning to PCIe 7.0 for chip-to-chip (C2C) connectivity. We will delve into how this transition impacts various use cases, including SSDs, network switches, and SuperNICs, highlighting the doubled data transfer rate of 128 GT/s per lane and its implications.
Gain insights into how PCIe 7.0 can improve SoC architectures by: