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Get an optimized starting point for implementing Synopsys ARC HS68 64-bit processors for high-performance embedded designs with Synopsys Fusion QuickStart Kits (QIKs). The ARC processor QIK includes tool scripts, a baseline floorplan, design constraints and documentation. In this session, you will learn how the QIK was used along with Synopsys Fusion Compiler and Design Space Optimization (DSO.ai) tools to achieve the best PPA and faster time-to-market.
Speakers
John Moors
ASIC Physical Design Engineer
Synopsys
John Moors started working for Philips Semiconductors in 1997 on PC monitors (the old analog ones with the big tubes) in the Systems Laboratory Eindhoven.
Around 2001 he moved to Philips Semiconductors Reuse Technology Group doing RTL design and synthesis on Epics7b DSP, and later also did maintenance place and route on ARM and MIPS processors. John started working on ARC Processors when the department was bought by Virage Logic and he joined Synopsys in 2011 as a result of the company¡¯s acquisition of Virage Logic. John holds a Bachelor of Science degree from Fontys Hogeschool Eindhoven (Polytechnics).
Frank Gover
Senior 91³Ô¹ÏÍø Engineer
Synopsys
Frank C. Gover, P.E., is a 91³Ô¹ÏÍø Engineer at Synopsys. He has 35 years of experience in the IC design industry and has three patents in the microprocessor design and several publications. Frank¡¯s current responsibilities involve leading global teams in advanced technology nodes bring up and developing Quickstart Implementation Kits (QIKs) for different IP providers. Frank holds a M.S. in Engineering Management from the University of Texas at Austin, a M.S. in Computer Engineering from the National Technological University at Fort Collins, Co., and a B.S. in Electrical Engineering from the University of Puerto Rico at Mayaguez.