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Synopsys IP Prototyping Kits for Ethernet

The Synopsys IP Prototyping Kits for Ethernet QoS and Ethernet XGMAC center around a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary SoC integration logic. The software and application examples are implemented on Synopsys¡¯ HAPS?-DX FPGA-based prototyping system, or they can be delivered separately as files for implementation on your in-house HAPS-DX system.

 

Highlights
  • Supports Synopsys Ethernet QoS Controller or Ethernet XGMAC Controller
  • Power management, clock reset and control block
  • SGMII interface enabled
  • PCIe Endpoint with ARM? AHB? interface
  • Xilinx 7 Series GTH Transceiver PIPE interface
  • Pre-instrumented debug for most relevant interfaces
  • IP Prototyping Kits for Ethernet are available in the following configurations:
    • Soft IP Prototyping Kits for use with your in-house HAPS-DX (Ethernet QoS)
    • HAPS-DX FPGA-based prototyping system with PC connection via PCI Express (Ethernet QoS and Ethernet XGMAC)