91³Ô¹ÏÍø

The Synopsys APB Advanced Peripheral components include many of the industry¡¯s commonly used interface IP. The highly configurable components allow design engineers to tailor the components to their desired design requirements. Comprehensive subsystems can be quickly assembled using coreAssembler, which is a graphical subsystem assembly tool. coreAssembler automates the subsystem assembly and IP configuration, including the creation of an initial verification testbench environment using Synopsys Verification IP, All of reduces the time to first simulation.

The Synopsys APB Advanced Peripheral components for AMBA are available in encrypted format as part of the DesignWare Library. RTL source code is available as a separate license, on a pay-per-use basis as part of the Synopsys APB Advanced Peripherals license package.

Highly configurable, programmable controller or target Synopsys Inter Integrated Circuit (I2C) device with an APB subordinate interface

• Supports all I2C speed modes, Standard (100Kb/s), Fast (400Kb/s) and High Speed (3.4Mb/s)
• Support for both 7 and 10 bits addressing
• Configurable transmit and receive buffer depths
• Handles bit and byte waiting at all bus speeds
• Includes a generic DMA hardware handshaking interface, compatible with the DW_ahb_dmac
• Supports SMBus/PMBus protocol
• SMBus specification version 3.1 compliance
• Supports Bus clear feature
• Supports controller clock frequency optimization
• Supports Ultra-Fast mode
• Supports up to 4 targets in a single instance of the DW_apb_i2c
• Supports UDID feature for all targets
• Supports ARP process for all targets
• Support for clock stretching
• AMBA 2.0 APB3 and APB4 support

Configurable controller or target device for the three-wire interface Synopsys Integrated Inter-IC Sound Bus (I2S) for streaming stereo audio between devices

• Operates as an i2s transmitter and or receiver
• Configurable support for up to 4 stereo channels for both transmitter and receiver
• Programmable audio data resolutions from 12 to 32 bits
• Configurable FIFO depths with programmable threshold values
• Comprehensive clocking options, synchronous and asynchronous APB and I2S clocks supported
• Includes a generic DMA hardware handshaking interface, compatible with the DW_ahb_dmac
• Supports full duplex communication due to the independence of transmitter and receiver
• Includes external serial clock gating and enable signals
• Supports Time Division Multiplexing (TDM) interface for multiple channels data transfer over a single data line
• Supports TDM interface manager/subordinate transmitter/receiver with full duplex operation
• Programmable switching between I2S and TDM modes
• Programmable number of channels in a TDM frame up to 16
• Serial output enable for TDM interface to make TDM interface audio data line tri-stateable

A programmable and configurable Synopsys Universal Asynchronous Receiver/Transmitter (UART) for the AMBA 2 APB bus

• 16750 compatible auto-flow control supported to increase system efficiency and reduce software load
• Option to include configurable transmit and receive FIFOs with programmable threshold levels for interrupt generation
• Generic DMA hardware handshaking interface, compatible with DW_ahb_dmac
• Serial infrared supported
• Advanced diagnostic capabilities with a modem control loopback mode
• Supports asynchronous pclk and serial baud clock with full synchronization
• Supports auto flow control
• RS485 interface support
• AMBA 2.0 APB3 and APB4 support

A programmable and configurable Synopsys Synchronous Serial Interface (SSI) for the AMBA 2 APB bus

• Supports following standards:
• Motorola SPI
• Standard/Dual/Quad/Octal SPI
• Texas instruments Synchronous serial protocol (SSP)
• National Semiconductor Microwire
• Programmable delay on the sample time of received serial data bit, enabling programmable control of routing delays resulting in higher serial data-bit rates
• Execute in Place (XIP) mode for SPI read transfers
• DDR and Read data strobe support for SPI transfers
• Data mask support for DDR Write transfers
• External DMA controller interface enables the DW_apb_ssi to interface to a DMA controller using handshaking interface for transfer requests
• AMBA 2.0 APB3 and APB4 support

Synopsys IP 91³Ô¹ÏÍø for the AMBA Interconnect