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Synopsys 112G Ethernet PHY IP 91³Ô¹ÏÍø

Synopsys 112G Ethernet PHY IP, an integral part of Synopsys' 400GbE/800GbE Ethernet solution enables long reach (LR), medium reach (MR), very short reach (VSR) electrical channels and CEI-112G-Linear, and CEI-112G-XSR+ optical interfaces. The 112G LR-Max PHY surpasses the performance targets of 112G-LR specification further extending channel reach in High Performance Compute applications.

The silicon-proven IP enables up to 800GbE hyperscale data center, networking, AI, pluggable optical module and Ethernet switch SoCs requiring high bandwidth and low latency.


Synopsys 112G LR-Max PHY

Using leading-edge analog mixed-signal design and advanced digital signal processing technologies, the 112G LR-Max PHY IP provides additional margins to the CEI-112G LR specification and provides three orders of magnitude better bit error rate compared to the spec for 45dB channels.

Synopsys 112G LR-Max TX Exceeds IEEE & OIF Jitter Specs with Symmetrical Eyes with Excellent Horizontal & Vertical Opening
Synopsys 112G LR-Max TX Exceeds IEEE & OIF Jitter Specs with Symmetrical Eyes with Excellent Horizontal & Vertical Opening

Synopsys 112G LR PHY

The power efficient PHY offers orders of magnitude better BER performance for Long Reach chip to chip channels with two connecters and multiple media. The PHYs¡¯ flexible layout maximizes bandwidth per die-edge by allowing the placement of square macros in a multi-row structure and along all edges of the die. Support for the Pulse-Amplitude Modulation 4-Level (PAM-4), Non- Return-to-Zero (NRZ) signaling, and independent, per-lane data rates allows ultimate flexibility to address a broad range of protocols and applications.

Synopsys 112G VSR PHY

Architected for very short reach chip-to-chip or chip-to-module electrical channels, the ultra-low power 112G VSR PHY enables power efficient pluggable and near packaged 400GbE/800GbE electro-optical interfaces. Combined with Synopsys' routing feasibility study, packages substrate guidelines, signal and power integrity models, and thorough crosstalk analysis, Synopsys provides a comprehensive 112G Ethernet PHY IP products for fast and reliable SoC integration.

Synopsys 112G Ethernet PHY IP Datasheet
Synopsys 112G Ethernet PHY IP for Very Short Reach

 

Highlights
Products
Downloads and Documentation
  • Supports full-duplex 1.25 to 112Gbps data rates in several lane configurations
  • Enables 100G, 200G, 400G, 800G Ethernet interconnects for wired and optical network infrastructure
  • Supports IEEE 802.3ck and OIF standards electrical specifications
  • Meets the performance requirements of multi-die, co-packaged optics, near-packaged optics, chip-to-chip, chip-to-module, and backplane interconnects
  • Provides comprehensive 200G/400G/800G solution with routing feasibility study, packages substrate guidelines, signal and power integrity models, and thorough crosstalk analysis
  • LR, MR and VSR: DAC-based PAM-4 transmitter includes feed forward equalization (FFE)
  • LR, MR and VSR: Digital-based receiver consists of analog front-end (AFE), ADC, and digital signal processor (DSP)
  • High-performance receive equalization supporting required channel loss
  • Continuous calibration and adaptation (CCA) algorithms provide robust performance across process, voltage, and temperature variations
  • Low jitter phase-locked loops (PLLs) provide robust timing recovery and better jitter performance
112G Ethernet LRM PHY, TSMC N3P x4, North/South (vertical) poly orientationSTARs Subscribe
112G Ethernet PHY, TSMC N3P x4 1.2V, North/South (vertical) poly orientationSTARs Subscribe
112G Ethernet PHY, TSMC N5 x4, North/South (vertical) poly orientationSTARs Subscribe
112G Ethernet PHY, TSMC N6 x1, North/South (vertical) poly orientationSTARs Subscribe
112G Ethernet PHY, TSMC N6 x2, North/South (vertical) poly orientationSTARs Subscribe
112G Ethernet PHY, TSMC N7 x1, North/South (vertical) poly orientationSTARs Subscribe
112G Ethernet PHY, TSMC N7 x2, North/South (vertical) poly orientationSTARs Subscribe
112G Ethernet PHY, TSMC N7 x4, North/South (vertical) poly orientationSTARs Subscribe
112G PHY, TSMC N7 x4, North/South (vertical) poly orientationSTARs Subscribe
Description: 112G Ethernet LRM PHY, TSMC N3P x4, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_lrm_phy_tsmc3pff_x4ns
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation: Contact Us for More Information
Description: 112G Ethernet PHY, TSMC N3P x4 1.2V, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_phy_tsmc3pff12_x4ns
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation: Contact Us for More Information
Product Code: G636-0
Description: 112G Ethernet PHY, TSMC N5 x4, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_phy_tsmc5ff_x4ns
Version: 3.07a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dwc_112g_ethernet_phy_tsmc5ff_x4ns
Product Code: E409-0
Description: 112G Ethernet PHY, TSMC N6 x1, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_phy_tsmc6ff_x1ns
Version: 3.05a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dwc_112g_ethernet_phy_tsmc6ff_x1ns
Description: 112G Ethernet PHY, TSMC N6 x2, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_phy_tsmc6ff_x2ns
Version: 3.05a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dwc_112g_ethernet_phy_tsmc6ff_x2ns
Description: 112G Ethernet PHY, TSMC N7 x1, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_phy_tsmc7ff_x1ns
Version: 3.04b
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dwc_112g_ethernet_phy_tsmc7ff_x1ns
Product Code: E401-0
Description: 112G Ethernet PHY, TSMC N7 x2, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_phy_tsmc7ff_x2ns
Version: 3.04b
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dwc_112g_ethernet_phy_tsmc7ff_x2ns
Product Code: E402-0
Description: 112G Ethernet PHY, TSMC N7 x4, North/South (vertical) poly orientation
Name: dwc_112g_ethernet_phy_tsmc7ff_x4ns
Version: 1.01a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation: Contact Us for More Information
Download: dwc_112g_ethernet_phy_tsmc7ff_x4ns
Description: 112G PHY, TSMC N7 x4, North/South (vertical) poly orientation
Name: dwc_112g_phy_tsmc7ff_x4ns
Version: 3.04a
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dwc_112g_phy_tsmc7ff_x4ns
Product Code: F913-0