Description: | Performs a combined unsigned/signed multiply and saturation |
Name: | DWF_dp_mult_comb_sat |
Version: | DWBB_202409.1 |
ECCN: | EAR99/NLR |
STARs: | Open and/or Closed STARs |
myDesignWare: | Subscribe for Notifications |
Product Type: | DesignWare Building Blocks |
Overview: | DesignWare Building Block Components |
Documentation: | |
Examples: | Functional Inference in Verilog Functional Inference in VHDL |