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VCS MATLAB/Simulink Native DPI Flow
System designs modeled in MATLAB? or Simulink? from MathWorks? can be directly simulated and debugged using Synopsys¡¯ comprehensive verification platform, comprised of VCS?, the fastest simulator in the industry, Verdi?, the most widely-adopted planning, coverage, and debug solution, and a complete range of functional verification tools and advanced technologies. VCS and MATLAB/Simulink offers a traditional co-simulation flow between the systems modeling environment and the HDL simulator, and now, with a direct interface resulting from close collaboration between Synopsys and MathWorks, it supports a new flow with up to 10X improved simulation performance.
Next-Generation VCS ¡ª MATLAB/Simulink Direct Interface
VCS and MATLAB/Simulink supports a direct interface that is up to 10X faster than the traditional co-simulation flow. In this new flow, the system algorithm models written in MATLAB/Simulink can be reused in the verification environment to drive the RTL HDL hardware design. The reuse of system models greatly reduces the need to manually create the equivalent HDL code, saving engineers¡¯ time. Check out this showing how to compile and use MATLAB functions as a scoreboard checker and stimulus generator inside a UVM sequence. This example uses Verdi to drive HDL simulation and compares the results with the corresponding high-level MATLAB model.
Benefits
- Easy to use command to export the models for integration within VCS
- Reusing system models as reference models reduces the testbench coding efforts and increases the verification accuracy
- Avoids using MATLAB/Simulink license during verification phase
- VCS enables faster verification closure on fast-growing design complexity across all segments, including imaging, vision, satellite communications etc.
- Native integration of VCS and Verdi with other tools in the Synopsys Verification Family provides access to the most comprehensive verification technology platform in the industry, spanning virtual prototyping, formal and static verification, low power verification, FPGA-based prototyping and emulation