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Each year, the Synopsys VC Formal Special Interest Group (SIG) aims to help develop, grow and encourage the formal verification community to exchange the latest innovations, techniques and methodologies to address complex verification challenges. This year¡¯s event will share details about groundbreaking applications and successful deployments of formal verification from industry leaders and formal enthusiasts worldwide.
Join us for this two-day virtual event to hear from experts at Intel, NVIDIA, Qualcomm, MediaTek, Sanechips, and other formal verification pioneers. Presentation topics will include:
- Harnessing the power of formal for smartphone SoC verification
- Lowering the barrier to entry for formal application
- Datapath verification for unit-level signoff
- Formally verifying late design changes for timing exception ECOs
- And more...
In addition, Synopsys presenters will showcase new capabilities from the Synopsys VC Formal June 2022 release and present a tutorial on formal signoff.
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Learn MoreThis year's event brings together Synopsys¡¯ Digital Design Technical Symposium and Verification Day into a single event - Synopsys Silicon Realization TechSummit. The quest for the best power, performance, and area, and delivery of first-time right silicon requires innovative solutions for designing and verifying complex chips. Attendees will hear from thought leaders in multi-die system design, low power, silicon lifecycle management, and verification on the solutions helping to achieve the best cost of results, quality of results and time-to-results.