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Synopsys' offers the industry¡¯s broadest portfolio of silicon-proven IP solutions for SoC designs.

The interoperability of Synopsys HAPS extends to the DesignWare? IP Prototyping Kits available for a variety of popular interface IP including: USB, PCI Express, and DDR. DesignWare IP Prototyping Kits provide a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary SoC integration logic such as clock, reset, power management, and test logic for a specific IP protocol, implemented on a HAPS-DX Series system. All kits include reference drivers, SoC integration logic, and application examples.

Using DesignWare IP with HAPS eases common prototyping tasks, including:

• Controller with PHY interoperability validation
• System compliance tests
• Subsystem integration
• Firmware/software development

See live video demonstrations of DesignWare IP implemented on HAPS systems.

Get more detail about HAPS daughter boards designed for interface and SoC validation.

A unified design and prototyping flow for SoC designs that integrates Synopsys DesignWare? IP eases the migration from the RTL/IP design to either HAPS prototyping system or target ASIC silicon. The Synopsys coreConsultant tool guides the user from installation to a HAPS prototype using the HAPS ProtoCompiler software or an ASIC implementation using the  Synopsys Design  Platform.