Synopsys Cloud
Cloud native EDA tools & pre-optimized hardware platforms
Request a Free Trial →
Shift from NRZ to PAM-4 Signaling for 400G Ethernet
Rita Horner, Sr. Technical Marketing Manager, Synopsys
Majority of businesses need access to a data center for data computing and storage. As businesses grow, the need for data processing and storage increases, requiring businesses to either scale-out by adding more storage or scale-up by upgrading to faster and more efficient systems. Both options are capital-intensive and do not provide the scalability that cloud or hyperscale data centers can. Because of these reasons, businesses are focusing on using hyperscale data centers to process and store their growing volumes of data. In turn, hyperscale data center service providers must allow faster interfaces by migrating from the current 100 Gigabit per second or Gig (G) Ethernet to 400G Ethernet links that are based on 56G 4-level Pulse Amplitude Modulation (PAM-4) signaling. Using the PAM-4 signaling is critical because Non-Return to Zero (NRZ) signaling is no longer able to support data rates beyond 32G for lossy channels beyond just few decibels (dB) of insertion loss. This article describes PAM-4 multi-level signaling and its trade-offs and benefits vs. NRZ for 56G data rates.
PAM-4 Signaling vs. NRZ Signaling
Multi-level signaling has been widely discussed by many standard bodies such as IEEE, as an alternative coding scheme to NRZ signaling when overcoming channel bandwidth limitations at higher data rates.
In NRZ signaling, one bit is a symbol and has two distinct amplitude levels of 0 or 1 (Figure 1). Symbols are expressed in terms of baud. NRZ bitrate is equal to its symbol rate where 1Gbps is equal to 1Gbaud.
Figure 1: NRZ signaling levels
In PAM-4 signaling, one bit has four distinct amplitude levels and two bits are grouped and mapped to one symbol (Figure 2). With two bits per symbol, the baud rate is half the bitrate. For example, 28G baud PAM-4 is equal to 56G NRZ. As such, PAM-4 achieves twice as much throughput using half the bandwidth compared to NRZ.
Figure 2: PAM-4 signaling levels
In standard linear PAM-4 signaling, it is possible for two transitions to happen at the same time. These transitions can cause two-bit errors per symbol. If standard PAM-4 signaling is converted to gray code, its bit error rate is reduced to one-bit per symbol and the overall bit error rate is cut in half (Figure 3).
Figure 3: PAM-4 signaling in gray code
At higher data rates, channel loss increases, and the same channel technology may be unusable for higher throughput. Because PAM-4 has half the baud rate of the NRZ signal, channel loss is lower at the same bitrate. The Nyquist frequency in NRZ is half of the bitrate (i.e., bits/second) compared to the quarter of a bitrate in PAM-4 signals. In Figure 4, the loss for 56G NRZ (Nyquist frequency of 28 GHz) is more than 60 dB compared to loss of around 30 dB at 14 GHz with 56G PAM-4 signaling across the same channel. This key advantage of PAM-4 allows the use of existing channels and interconnects at higher bitrates without the need for doubling the baud rate and increasing the channel loss.
Figure 4: Shift from NRZ to PAM-4
However, PAM-4 does not universally guarantee the use of legacy channel designs, as channel impairments such as crosstalk, return-loss, and nonlinearity have larger impact on PAM-4 signals, that needs to be addressed.
Impact of Channel Impairments
Compared to NRZ¡¯s two voltage levels, PAM-4 has four voltage levels that result in 12 distinct signal transitions, (six rise & six fall times) creating three district eye openings, as shown in Figure 5. Each eye height is 1/3 of an NRZ eye height, causing the PAM-4 signal-to-noise ratio (SNR) to degrade by over 9.5 dB, which impacts the signal quality and introduces additional constraints in high-speed signaling. The 33% smaller vertical eye opening reduces the signal¡¯s tolerance to crosstalk and reflection in PAM-4 resulting in a higher bit error rate.
Figure 5: NRZ vs. PAM4 signal transitions and eye openings
Similarly, switching between the four voltage levels in PAM-4 causes inherent transition jitter that is a form of deterministic jitter, which reduces the signal eye width by 2/3 to 1/2 of NRZ.
Non-linearity can also alter the signal eye height, significantly impacting the bit error rate performance which is dominantly affected by deterministic jitter and noise.
Channel impairments impact each of the three eyes in PAM-4 differently, requiring each eye to have its own dedicated group of data, error, and signal crossing detectors. All three eyes in PAM-4 are asymmetrical and each needs to be equalized independently.
Summary
Hyperscale data centers are becoming the top choice for businesses to enable processing and storing high volumes of data for execution of various workloads targeting a broad range of data-intensive applications. In order to allow faster data connectivity to enable high volumes of data in hyperscale data centers, service providers are leveraging up to 400G Ethernet links that are based on the 56G PAM-4 signaling. Since NRZ signaling is insufficient and PAM-4 enables higher bitrates at half the baud rate, designers can continue to use existing channels at potential 400G Ethernet data rates. However, PAM-4 signaling is more sensitive to channel impairments such as crosstalk and non-linearity, which needs to be addressed in the PHY design implementation.
Synopsys provides silicon-proven PAM-4 DesignWare? 56G PHY IP that designers can integrate into their hyperscale SoCs to support up to 400G Ethernet links. The PHY is built on Synopsys¡¯ silicon-proven data converters with configurable transmitter and DSP-based receiver, enabling designers to optimize signal integrity and performance. While supporting the IEEE and Optical Interconnect Forum (OIF) standards specifications, the PHY enables chip-to-chip, chip-to-module (copper and optical), and copper backplane interconnects, down to 35 dB channel loss. In addition, the embedded bit error rate tester and internal eye monitor provide on-chip testability and visibility into channel performance.