Cloud native EDA tools & pre-optimized hardware platforms
Synopsys IP Presentations
D&R IP SoC Silicon Valley 2023?
Manmeet Walia
Product Manager Director
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Ethernet design starts are normally ahead of the IEEE & OIF specification release. The 1.6T Ethernet standard is no exception as companies are already designing SoCs for a wide range of applications requiring high-speed SerDes. Early silicon proof points with the right 224G SerDes technology allows for a clear insight into all the requirements to achieve 1.6T success. This presentation uses an example of a silicon proof point to highlight the architectural requirements, such as DSP, forward-error correction, PAM-4 vs. PAM-6 signaling, that designers need to consider to confidently move to 1.6T designs.